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Extract from the Register of European Patents

EP About this file: EP0618673

EP0618673 - A differential amplification circuit wherein a DC level at an output terminal is automatically adjusted [Right-click to bookmark this link]
Former [1994/40]A differential amplification circuit wherein a DC level at an output terminal is automatically adjusted and a power amplifier wherein a BTL drive circuit is driven by a half wave
[1998/51]
StatusNo opposition filed within time limit
Status updated on  09.06.2000
Database last updated on 15.07.2024
Most recent event   Tooltip09.06.2000No opposition filed within time limitpublished on 26.07.2000 [2000/30]
Applicant(s)For all designated states
SANYO ELECTRIC CO., LTD.
5-5, Keihanhondori 2-chome
Moriguchi-shi, Osaka 570 / JP
[N/P]
Former [1999/32]For all designated states
SANYO ELECTRIC Co., Ltd.
5-5, Keihanhondori 2-chome
Moriguchi-shi, Osaka 570 / JP
Former [1994/40]For all designated states
SANYO ELECTRIC Co., Ltd.
5-5, Keihanhondori 2-chome
Moriguchi-shi, Osaka / JP
Inventor(s)01 / Takahashi, Yoshiaki
2855-6, Nakano, Ora-machi
Ora-gun, Gunma / JP
[1994/40]
Representative(s)Glawe, Delfs, Moll
Partnerschaft mbB von
Patent- und Rechtsanwälten
Postfach 26 01 62
80058 München / DE
[N/P]
Former [1994/40]Glawe, Delfs, Moll & Partner
Patentanwälte Postfach 26 01 62
D-80058 München / DE
Application number, filing date94103930.714.03.1994
[1994/40]
Priority number, dateJP1993006991629.03.1993         Original published format: JP 6991693
JP1993016786407.07.1993         Original published format: JP 16786493
[1994/40]
Filing languageEN
Procedural languageEN
PublicationType: A2 Application without search report 
No.:EP0618673
Date:05.10.1994
Language:EN
[1994/40]
Type: A3 Search report 
No.:EP0618673
Date:06.12.1995
Language:EN
[1995/49]
Type: B1 Patent specification 
No.:EP0618673
Date:11.08.1999
Language:EN
[1999/32]
Search report(s)(Supplementary) European search report - dispatched on:EP19.10.1995
ClassificationIPC:H03F1/02, H03F1/30, H03F3/45
[1995/49]
CPC:
H03F1/0244 (EP,KR,US); H03F1/0233 (EP,KR,US); H03F1/307 (EP,KR,US)
Former IPC [1994/40]H03F1/02
Designated contracting statesDE,   FR,   GB [1994/40]
TitleGerman:Eine Differenzverstärkerschaltung mit automatisch eingestelltem Gleichstrompegel an dem Ausgangsanschluss[1998/51]
English:A differential amplification circuit wherein a DC level at an output terminal is automatically adjusted[1998/51]
French:Un circuit amplificateur différentiel dont un niveau de courant continu est réglé automatiquement à un terminal de sortie[1998/51]
Former [1994/40]Eine Differenzverstärkerschaltung mit automatisch eingestelltem Gleichstrompegel an dem Ausgangsanschluss und ein Leistungsverstärker mit einer durch eine Halbwelle gesteuerte BTL-Schaltung
Former [1994/40]A differential amplification circuit wherein a DC level at an output terminal is automatically adjusted and a power amplifier wherein a BTL drive circuit is driven by a half wave
Former [1994/40]Un circuit amplificateur différentiel dont un niveau de courant continu et réglé automatiquement à un terminal de sortie et un amplificateur de puissance dont un circuit BTL de commande est commandé par une demie onde
Examination procedure08.03.1996Examination requested  [1996/19]
10.12.1996Despatch of a communication from the examining division (Time limit: M06)
17.06.1997Reply to a communication from the examining division
12.11.1998Despatch of communication of intention to grant (Approval: Yes)
12.02.1999Communication of intention to grant the patent
18.05.1999Fee for grant paid
18.05.1999Fee for publishing/printing paid
Opposition(s)12.05.2000No opposition filed within time limit [2000/30]
Fees paidRenewal fee
15.03.1996Renewal fee patent year 03
17.03.1997Renewal fee patent year 04
19.03.1998Renewal fee patent year 05
19.03.1999Renewal fee patent year 06
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Documents cited:Search[A]JPS5970307  ;
 [A]JPS5531302  ;
 [X]JPS58123615U  (SANSUI DENKI K. K.) [X] 1 * page 1, column 1, line 1 - column 2, line 10; figures 2-5 *;
 [X]US5162752  (PADI GYULA [US]) [X] 1 * column 6, line 42 - column 8, line 26; figures 2-7 *;
 [X]  - L. TOMASINI ET AL., "A Fully Differential CMOS Line Driver for ISDN", IEEE JOURNAL OF SOLID-STATE CIRCUITS, NEW YORK US, vol. 25, no. 2, pages 546 - 554, XP000116700 [X] 1-5 * page 548, column 1, line 8 - column 2, line 42 *

DOI:   http://dx.doi.org/10.1109/4.52183
 [A]  - "Power Amplifier (Buffer) with Low Output Impedance and Current Measurement Capability", IBM TECHNICAL DISCLOSURE BULLETIN, NEW YORK US, vol. 30, no. 7, pages 95 - 97 [A] 1,4,5 * figures 1-3 *
 [A]  - PATENT ABSTRACTS OF JAPAN, (19840814), vol. 8, no. 176, Database accession no. (E - 260), & JP59070307 A 00000000 (MATSUSHITA DENKI SANGYO KK) [A] 1 * abstract *
 [A]  - PATENT ABSTRACTS OF JAPAN, (19800513), vol. 4, no. 63, Database accession no. (E - 010), & JP55031302 A 19800305 (TOSHIBA CORP) [A] 1 * abstract *
 [A]  - "Sinuswellen aus Dreieckspannungen", ELEKTROTECHNIK, WURZBURG DE, vol. 60, no. 20, page 124 [A] 3 * the whole document *
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