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Extract from the Register of European Patents

EP About this file: EP0624904

EP0624904 - A multi-layer wiring board and a manufacturing method thereof [Right-click to bookmark this link]
StatusNo opposition filed within time limit
Status updated on  26.09.2003
Database last updated on 24.04.2024
Most recent event   Tooltip25.07.2008Change - representativepublished on 27.08.2008  [2008/35]
Applicant(s)For all designated states
NEC Corporation
7-1, Shiba 5-chome Minato-ku
Tokyo 108-8001 / JP
[N/P]
Former [2002/47]For all designated states
NEC CORPORATION
7-1, Shiba 5-chome, Minato-ku
Tokyo / JP
Former [1994/46]For all designated states
NEC CORPORATION
7-1, Shiba 5-chome Minato-ku
Tokyo / JP
Inventor(s)01 / Ishida, Hisashi, c/o NEC Corporation
7-1, Shiba 5-chome, Minato-ku
Tokyo / JP
[1994/46]
Representative(s)Vossius & Partner Patentanwälte Rechtsanwälte mbB
Siebertstrasse 3
81675 München / DE
[N/P]
Former [2008/35]Vossius & Partner
Siebertstrasse 3
81675 München / DE
Former [1994/46]VOSSIUS & PARTNER
Siebertstrasse 4
D-81675 München / DE
Application number, filing date94106137.620.04.1994
[1994/46]
Priority number, dateJP1993011795421.04.1993         Original published format: JP 11795493
[1994/46]
Filing languageEN
Procedural languageEN
PublicationType: A2 Application without search report 
No.:EP0624904
Date:17.11.1994
Language:EN
[1994/46]
Type: A3 Search report 
No.:EP0624904
Date:19.04.1995
Language:EN
[1995/16]
Type: B1 Patent specification 
No.:EP0624904
Date:20.11.2002
Language:EN
[2002/47]
Search report(s)(Supplementary) European search report - dispatched on:EP06.03.1995
ClassificationIPC:H01L23/538, H01L21/48
[1994/46]
CPC:
H05K3/462 (EP,US); H01L21/4857 (EP,US); H01L23/5383 (EP,US);
H01L2924/0002 (EP,US); H01L2924/09701 (EP,US); H01L2924/15312 (EP,US);
H05K1/0306 (EP,US); H05K1/0313 (EP,US); H05K2201/0195 (EP,US);
H05K3/28 (EP,US); H05K3/4605 (EP,US); H05K3/4623 (EP,US);
Y10S428/901 (EP,US); Y10T29/49126 (EP,US) (-)
C-Set:
H01L2924/0002, H01L2924/00 (EP,US)
Designated contracting statesDE,   FR,   GB [1994/46]
TitleGerman:Mehrlagige Verdrahtungsplatine und ihre Herstellung[1994/46]
English:A multi-layer wiring board and a manufacturing method thereof[1994/46]
French:Circuit imprimé multicouche et procédé de fabrication associé[1994/46]
Examination procedure14.03.1995Examination requested  [1995/19]
05.06.1996Despatch of a communication from the examining division (Time limit: M06)
12.12.1996Reply to a communication from the examining division
17.06.1997Despatch of a communication from the examining division (Time limit: M04)
17.10.1997Reply to a communication from the examining division
26.03.1998Despatch of a communication from the examining division (Time limit: M04)
29.06.1998Reply to a communication from the examining division
05.02.1999Despatch of a communication from the examining division (Time limit: M04)
15.06.1999Reply to a communication from the examining division
19.11.1999Despatch of a communication from the examining division (Time limit: M06)
17.04.2000Reply to a communication from the examining division
25.05.2001Despatch of a communication from the examining division (Time limit: M04)
30.08.2001Reply to a communication from the examining division
10.10.2001Despatch of communication of intention to grant (Approval: No)
14.05.2002Despatch of a communication from the examining division (Time limit: M04)
05.06.2002Reply to a communication from the examining division
13.06.2002Despatch of communication of intention to grant (Approval: later approval)
19.06.2002Communication of intention to grant the patent
09.08.2002Fee for grant paid
09.08.2002Fee for publishing/printing paid
Opposition(s)21.08.2003No opposition filed within time limit [2003/46]
Fees paidRenewal fee
30.04.1996Renewal fee patent year 03
30.04.1997Renewal fee patent year 04
29.04.1998Renewal fee patent year 05
30.04.1999Renewal fee patent year 06
28.04.2000Renewal fee patent year 07
30.04.2001Renewal fee patent year 08
30.04.2002Renewal fee patent year 09
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Documents cited:Search[XY]US4803595  (KRAUS CHARLES J [US], et al) [X] 1,4-9 * column 2, line 45 - line 60; figures 1,3 * [Y] 2,3;
 [Y]JPH03246993  (HITACHI LTD) [Y] 2,3;
 US5350886  [ ] (MIYAZAKI KUNIO [JP], et al) [ ] * column 3, line 41 - line 52 * * column 4, line 62 - column 5, line 14; figures 1,2 *;
 [A]EP0237808  (IBM [US]);
 [PX]US5224265  (DUX JOHN B [US], et al) [PX] 2,3,5,7-9 * column W *
ExaminationJPH0410696
 JPH05144973
 JPH04312998
 US5146674
 EP0543364
 EP0494668
 US3677112
    - PATENT ABSTRACTS OF JAPAN, (19920417), vol. 016, no. 158, Database accession no. (E - 1191), & JP04010696 A 19920114 (NITTO DENKO CORP)
    - PATENT ABSTRACTS OF JAPAN, (19930922), vol. 017, no. 528, Database accession no. (E - 1437), & JP05144973 A 19930611 (NEC CORP)
    - PATENT ABSTRACTS OF JAPAN, (19930324), vol. 017, no. 148, Database accession no. (E - 1338), & JP04312998 A 19921104 (NEC CORP)
The EPO accepts no responsibility for the accuracy of data originating from other authorities; in particular, it does not guarantee that it is complete, up to date or fit for specific purposes.