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Extract from the Register of European Patents

EP About this file: EP0648019

EP0648019 - CMOS circuit with high withstand-voltage [Right-click to bookmark this link]
StatusNo opposition filed within time limit
Status updated on  20.07.2007
Database last updated on 27.07.2024
Most recent event   Tooltip20.07.2007No opposition filed within time limitpublished on 22.08.2007  [2007/34]
Applicant(s)For all designated states
Micronas GmbH
Hans-Bunte-Strasse 19
79108 Freiburg i. Br. / DE
[2006/37]
Former [2000/27]For all designated states
Micronas GmbH
Hans-Bunte-Strasse 19
79108 Freiburg / DE
Former [1998/06]For all designated states
Micronas Intermetall GmbH
Hans-Bunte-Strasse 19
79108 Freiburg / DE
Former [1995/15]For all designated states
Deutsche ITT Industries GmbH
Hans-Bunte-Strasse 19
D-79108 Freiburg / DE
Inventor(s)01 / Blossfeld, Lothar, Dipl.-Phys.
Dorfstrasse 16
D-79874 Breitnau / DE
02 / Theus, Ulrich, Dr.-Ing.
Schönbergstrasse 5b
D-79194 Gundelfingen / DE
03 / Motz, Mario, Dipl.-Ing.
Einsiedelnstrasse 6
D-79346 Endingen / DE
 [2006/36]
Former [1995/15]01 / Blossfeld, Lothar, Dipl.-Phys.
Dorfstrasse 16
D-79874 Breitnau / DE
02 / Theus, Ulrich, Dr.-Ing.
Schönbergstrasse 5b
D-79194 Gundelfingen / DE
03 / Motz, Mario, Dipl.-Ing.
Einsiedelnstrase 6
D-79346 Endingen / DE
Application number, filing date94115531.901.10.1994
[1995/15]
Priority number, dateDE1993433451309.10.1993         Original published format: DE 4334513
[1995/15]
Filing languageDE
Procedural languageDE
PublicationType: A2 Application without search report 
No.:EP0648019
Date:12.04.1995
Language:DE
[1995/15]
Type: A3 Search report 
No.:EP0648019
Date:26.02.1997
[1997/09]
Type: B1 Patent specification 
No.:EP0648019
Date:13.09.2006
Language:DE
[2006/37]
Search report(s)(Supplementary) European search report - dispatched on:EP07.01.1997
ClassificationIPC:H03K17/10, H03K17/0814, H03K19/003, H03K19/0185, H01L27/092
[1997/07]
CPC:
H03K17/102 (EP,US); H01L27/08 (KR); H01L27/0266 (EP,US);
H01L27/092 (EP,US); H03K17/08142 (EP,US); H01L2924/0002 (EP,US)
C-Set:
H01L2924/0002, H01L2924/00 (EP,US)
Former IPC [1995/15]H03K17/10, H03K17/0814
Designated contracting statesDE,   FR,   GB,   IT,   NL,   SE [1995/15]
TitleGerman:CMOS-Schaltung mit erhöhter Spannungsfestigkeit[1995/15]
English:CMOS circuit with high withstand-voltage[1995/15]
French:Circuit CMOS à tenue en tension élevée[1995/15]
Examination procedure26.08.1997Examination requested  [1997/43]
17.08.1999Despatch of a communication from the examining division (Time limit: M04)
03.12.1999Reply to a communication from the examining division
22.10.2001Despatch of a communication from the examining division (Time limit: M04)
27.02.2002Reply to a communication from the examining division
22.11.2004Despatch of a communication from the examining division (Time limit: M04)
31.03.2005Reply to a communication from the examining division
15.03.2006Communication of intention to grant the patent
25.07.2006Fee for grant paid
25.07.2006Fee for publishing/printing paid
Opposition(s)14.06.2007No opposition filed within time limit [2007/34]
Fees paidRenewal fee
31.10.1996Renewal fee patent year 03
31.10.1997Renewal fee patent year 04
02.11.1998Renewal fee patent year 05
02.11.1999Renewal fee patent year 06
31.10.2000Renewal fee patent year 07
31.10.2001Renewal fee patent year 08
31.10.2002Renewal fee patent year 09
31.10.2003Renewal fee patent year 10
02.11.2004Renewal fee patent year 11
27.10.2005Renewal fee patent year 12
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Documents cited:Search[X]US5243236  (MCDANIEL BART R [US]) [X] 1-4,7 * figures 4-8 * * column 3, line 13 - column 6, line 3 *;
 [X]US5179297  (HSUEH KELVIN K [US], et al) [X] 1,2 * column 11, line 52 - column 15, line 11 * * figures 3,6 *;
 [A]EP0094143  (AMERICAN MICRO SYST [US]) [A] 1,2 * abstract *;
 [A]EP0316033  (PHILIPS NV [NL]) [A] 1 * abstract *;
 [A]EP0190027  (TOSHIBA KK [JP]) [A] 1,2 * abstract *
The EPO accepts no responsibility for the accuracy of data originating from other authorities; in particular, it does not guarantee that it is complete, up to date or fit for specific purposes.