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Extract from the Register of European Patents

EP About this file: EP0632582

EP0632582 - Operational amplifier and method [Right-click to bookmark this link]
Status	No opposition filed within time limit Status updated on 04.06.1999 Database last updated on 12.07.2024
Most recent event Tooltip	01.08.2008	Change - applicant	published on 03.09.2008 [2008/36]
Applicant(s)	For all designated states ADVANCED MICRO DEVICES, INC. One AMD Place Mail Stop 68 P.O. Box 3453 Sunnyvale CA 94088-3453 / US
	[2008/36]
Former [1995/01]	For all designated states ADVANCED MICRO DEVICES INC. One AMD Place, P.O. Box 3453 Sunnyvale, California 94088-3453 / US
Inventor(s)	01 / Brehmer, Geoffrey E. 1711 Gracy Farms Lane Austin, Texas 78758 / US
	[1995/01]
Representative(s)	Wright, Hugh Ronald, et al Brookes Batchellor LLP 1 Boyne Park Tunbridge Wells Kent TN4 8EL / GB
	[N/P]
Former [1995/01]	Wright, Hugh Ronald, et al Brookes & Martin 52/54 High Holborn London WC1V 6SE / GB
Application number, filing date	94303244.1	05.05.1994
	[1995/01]
Priority number, date	US19930085898	30.06.1993 Original published format: US 85898
	[1995/01]
Filing language	EN
Procedural language	EN
Publication	Type:	A1 Application with search report
	No.:	EP0632582
	Date:	04.01.1995
	Language:	EN
	[1995/01]
	Type:	B1 Patent specification
	No.:	EP0632582
	Date:	29.07.1998
	Language:	EN
	[1998/31]
Search report(s)	(Supplementary) European search report - dispatched on:	EP	26.10.1994
Classification	IPC:	H03F3/45	[1995/01]
	CPC:	H03F3/45076 (EP,US)
Designated contracting states	BE, DE, DK, ES, FR, GB, GR, IE, IT, LU, NL, PT, SE [1995/01]
Title	German:	Operationsverstärker und Verfahren dazu	[1995/01]
	English:	Operational amplifier and method	[1995/01]
	French:	Amplificateur opérationnel et procédé correspondant	[1995/01]
Examination procedure	10.04.1995	Examination requested [1995/24]
	15.01.1997	Despatch of a communication from the examining division (Time limit: M06)
	16.07.1997	Reply to a communication from the examining division
	21.11.1997	Despatch of communication of intention to grant (Approval: Yes)
	05.02.1998	Communication of intention to grant the patent
	24.04.1998	Fee for grant paid
	24.04.1998	Fee for publishing/printing paid
Opposition(s)	30.04.1999	No opposition filed within time limit [1999/29]
Fees paid	Renewal fee
	09.05.1996	Renewal fee patent year 03
	07.05.1997	Renewal fee patent year 04
	11.05.1998	Renewal fee patent year 05
Opt-out from the exclusive Tooltip competence of the Unified Patent Court	See the Register of the Unified Patent Court for opt-out data
	Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court.
Lapses during opposition Tooltip	ES	29.07.1998
	FR	29.07.1998
	GR	29.07.1998
	IT	29.07.1998
	NL	29.07.1998
	DK	29.10.1998
	PT	29.10.1998
	SE	29.10.1998
	[2008/05]
Former [2006/14]	ES	29.07.1998
	FR	29.07.1998
	GR	29.07.1998
	NL	29.07.1998
	DK	29.10.1998
	PT	29.10.1998
	SE	29.10.1998
Former [2003/45]	ES	29.07.1998
	GR	29.07.1998
	NL	29.07.1998
	DK	29.10.1998
	PT	29.10.1998
	SE	29.10.1998
	FR	24.12.1998
Former [2003/08]	ES	29.07.1998
	GR	29.07.1998
	NL	29.07.1998
	PT	29.10.1998
	SE	29.10.1998
	FR	24.12.1998
Former [2002/26]	ES	29.07.1998
	GR	29.07.1998
	PT	29.10.1998
	SE	29.10.1998
	FR	24.12.1998
Former [2001/23]	GR	29.07.1998
	PT	29.10.1998
	SE	29.10.1998
	FR	24.12.1998
Former [1999/29]	PT	29.10.1998
	SE	29.10.1998
	FR	24.12.1998
Former [1999/22]	FR	24.12.1998
Documents cited:	Search	[A]EP0028932 (RCA CORP [US]) [A] * page 4, line 4 - page 5, line 28; figure 2 *;
		[Y]US5006817 (BABANEZHAD JOSEPH N [US]) [Y] 1,9,10 * column 3, line 22 - column 4, line 2; figure 2 *;
		[A]US5015966 (MCINTYRE HARRY J [US]) [A] * column 2, line 18 - column 4, line 65; figure 2 *;
		[A]EP0493335 (SGS THOMSON MICROELECTRONICS [IT]) [A] * column 2, line 48 - line 57; figure 1 *;
		[Y] - HIDETOSHI ONODERA ET AL, "Analog circuit placement -branche-and-bound placement with shape optimization-", PROCEEDINGS OF THE IEEE 1992 CUSTOM INTEGRATED CIRCUITS CONFERENCE, BOSTON, US, (19920503), pages 11.5.1 - 11.5.6, XP000340891 [Y] 1,9,10 * page 11.5.5; figure 7 *
		[A] - J. F. DUQUE-CARRILLO ET AL, "A family of bias circuits for high input swing CMOS operational amplifiers", 1992 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, SAN DIEGO, US, (19920510), vol. 6, pages 3021 - 3024, XP000338847 DOI: http://dx.doi.org/10.1109/ISCAS.1992.230685
	by applicant	US5006817

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