-
EP0649146
European procedure
Extract from the Register of European Patents
EP About this file: EP0649146
| EP0649146 - Semiconductor integrated circuit device [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 26.05.2000 Database last updated on 13.09.2024 | Most recent event Tooltip | 26.05.2000 | No opposition filed within time limit | published on 12.07.2000 [2000/28] | Applicant(s) | For all designated states Oki Electric Industry Co., Ltd. 7-12, Toranomon 1-chome Minato-ku Tokyo / JP | [N/P] |
| Former [1995/16] | For all designated states Oki Electric Industry Co., Ltd. 7-12, Toranomon 1-chome Minato-ku Tokyo / JP | Inventor(s) | 01 /
Sugio, Kenichiro c/o Oki Micro Miyazaki Co., Ltd., 9-2 Yamato-cho Miyazaki-shi, Miyazaki-pref. / JP | [1995/16] | Representative(s) | Read, Matthew Charles, et al Venner Shipley LLP 200 Aldersgate London EC1A 4HD / GB | [N/P] |
| Former [1995/16] | Read, Matthew Charles, et al Venner Shipley & Co. 20 Little Britain London EC1A 7DH / GB | Application number, filing date | 94307233.0 | 03.10.1994 | [1995/16] | Priority number, date | JP19930255424 | 13.10.1993 Original published format: JP 25542493 | [1995/16] | Filing language | EN | Procedural language | EN | Publication | Type: | A1 Application with search report | No.: | EP0649146 | Date: | 19.04.1995 | Language: | EN | [1995/16] | Type: | B1 Patent specification | No.: | EP0649146 | Date: | 21.07.1999 | Language: | EN | [1999/29] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 18.01.1995 | Classification | IPC: | G11C8/00 | [1995/16] | CPC: |
G11C11/4085 (KR);
G11C11/4087 (KR);
G11C8/08 (EP,KR,US);
G11C8/10 (KR)
| Designated contracting states | DE, FR, GB, NL [1995/16] | Title | German: | Integrierte Halbleiterschaltungsanordnung | [1995/16] | English: | Semiconductor integrated circuit device | [1995/16] | French: | Dispositif de circuit intégré à semi-conducteurs | [1995/16] | Examination procedure | 15.08.1995 | Examination requested [1995/41] | 04.05.1998 | Despatch of a communication from the examining division (Time limit: M04) | 03.09.1998 | Reply to a communication from the examining division | 27.10.1998 | Despatch of communication of intention to grant (Approval: Yes) | 27.01.1999 | Communication of intention to grant the patent | 19.03.1999 | Fee for grant paid | 19.03.1999 | Fee for publishing/printing paid | Opposition(s) | 26.04.2000 | No opposition filed within time limit [2000/28] | Fees paid | Renewal fee | 18.10.1996 | Renewal fee patent year 03 | 24.10.1997 | Renewal fee patent year 04 | 23.10.1998 | Renewal fee patent year 05 |
| Opt-out from the exclusive Tooltip competence of the Unified Patent Court | See the Register of the Unified Patent Court for opt-out data | ||
| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [A]EP0551598 (IBM [US]) [A] 1,5,7 * abstract * * column 3, line 32 - column 7, line 41; figures 1,2 *; | [A]EP0405812 (TEXAS INSTRUMENTS INC [US]) [A] 1,5,7 * abstract * * column 9, line 20 - column 12, line 49; figures 1-5 * | [A] - "CROSS-COUPLED LEVEL SHIFTING LOW VOLTAGE WORDLINE DRIVER FOR DRAM", IBM TECHNICAL DISCLOSURE BULLETIN., NEW YORK US, (199109), vol. 34, no. 4B, pages 332 - 334 [A] 1,5,7 * the whole document * | Examination | JPS63113888 |