EP0653792 - Electrostatic discharge protection device for semiconductor chip packages [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 02.07.1999 Database last updated on 21.05.2024 | Most recent event Tooltip | 02.07.1999 | No opposition filed within time limit | published on 18.08.1999 [1999/33] | Applicant(s) | For all designated states POLAROID CORPORATION 549 Technology Square Cambridge Massachusetts 02139 / US | [N/P] |
Former [1995/20] | For all designated states POLAROID CORPORATION 549 Technology Square Cambridge, Massachusetts 02139 / US | Inventor(s) | 01 /
Cronin, David V. 7 Hampshire Road Peabody MA 01960 / US | [1995/20] | Representative(s) | Skone James, Robert Edmund Gill Jennings & Every LLP The Broadgate Tower 20 Primrose Street London EC2A 2ES / GB | [N/P] |
Former [1995/20] | Skone James, Robert Edmund GILL JENNINGS & EVERY Broadgate House 7 Eldon Street London EC2M 7LH / GB | Application number, filing date | 95101140.2 | 06.03.1992 | [1995/20] | Priority number, date | US19910687044 | 18.04.1991 Original published format: US 687044 | US19910800612 | 27.11.1991 Original published format: US 800612 | [1995/20] | Filing language | EN | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | EP0653792 | Date: | 17.05.1995 | Language: | EN | [1995/20] | Type: | A3 Search report | No.: | EP0653792 | Date: | 27.12.1995 | Language: | EN | [1995/52] | Type: | B1 Patent specification | No.: | EP0653792 | Date: | 26.08.1998 | Language: | EN | [1998/35] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 09.11.1995 | Classification | IPC: | H01L23/60, H05F1/00 | [1995/20] | CPC: |
H05F3/00 (EP,US);
H01L23/60 (EP,US);
H01R13/6582 (EP,US);
H01R13/6594 (EP,US);
H05F1/00 (EP,US);
H05K9/0067 (EP,US);
H01L2924/0002 (EP,US)
(-)
| C-Set: |
H01L2924/0002, H01L2924/00 (EP,US)
| Designated contracting states | DE, FR, GB, IT, NL [1995/20] | Title | German: | Elektrostatische Entladungsschutzvorrichtung für Halbleiterchippackungen | [1995/20] | English: | Electrostatic discharge protection device for semiconductor chip packages | [1995/20] | French: | Dispositif de protection contre les décharges électrostatiques pour emballage de puces semi-conductrices | [1995/20] | Examination procedure | 14.06.1996 | Examination requested [1996/34] | 06.11.1997 | Despatch of communication of intention to grant (Approval: Yes) | 04.03.1998 | Communication of intention to grant the patent | 21.05.1998 | Fee for grant paid | 21.05.1998 | Fee for publishing/printing paid | Parent application(s) Tooltip | EP92301936.8 / EP0509634 | Opposition(s) | 27.05.1999 | No opposition filed within time limit [1999/33] | Fees paid | Renewal fee | 24.02.1995 | Renewal fee patent year 03 | 24.02.1995 | Renewal fee patent year 04 | 14.02.1996 | Renewal fee patent year 05 | 13.02.1997 | Renewal fee patent year 06 | 16.02.1998 | Renewal fee patent year 07 |
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Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [DA]DE2348630 (SIEMENS AG) [DA] 1 * page 3, line 16 - page 4, line 9 * * figures 1,2 *; | [A]US4019094 (DINGER EDWARD H, et al) [A] 1 * abstract * * figures 1,2 *; | [A]US4521828 (FANNING WILLIAM J [US]) [A] 1 * abstract * * figures 6-8 *; | [A] - CARLTON G. MIDDLEBROOK, "Electrical Shorting Cap", NAVY TECHNICAL DISCLOSURE BULLETIN, VIRGINIA, vol. 6, no. 3, pages 33 - 36, XP001454875 [A] 1 * figures 1-3 * * page 35, line 1 - page 36, line 2 * |