| EP0689252 - Semiconductor device [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 01.06.2001 Database last updated on 19.03.2026 | Most recent event Tooltip | 01.06.2001 | No opposition filed within time limit | published on 18.07.2001 [2001/29] | Applicant(s) | For all designated states NEC Corporation 7-1, Shiba 5-chome Minato-ku Tokyo 108-8001 / JP | [N/P] |
| Former [2000/31] | For all designated states NEC CORPORATION 7-1, Shiba 5-chome, Minato-ku Tokyo / JP | ||
| Former [1995/52] | For all designated states NEC CORPORATION 7-1, Shiba 5-chome Minato-ku Tokyo / JP | Inventor(s) | 01 /
Watanabe, Hirohito c/o NEC Corporation, 7-1, Shiba 5-chome Minato-ku, Tokyo / JP | 02 /
Tatsumi, Toru c/o NEC Corporation, 7-1, Shiba 5-chome Minato-ku, Tokyo / JP | [1995/52] | Representative(s) | Schlich, George William, et al Mathys & Squire LLP 120 Holborn London EC1N 2SQ / GB | [N/P] |
| Former [1995/52] | Schlich, George William, et al Mathys & Squire 100 Grays Inn Road London WC1X 8AL / GB | Application number, filing date | 95110516.2 | 20.03.1991 | [1995/52] | Priority number, date | JP19900072462 | 20.03.1990 Original published format: JP 7246290 | JP19900249154 | 19.09.1990 Original published format: JP 24915490 | JP19900327069 | 28.11.1990 Original published format: JP 32706990 | [1995/52] | Filing language | EN | Procedural language | EN | Publication | Type: | A1 Application with search report | No.: | EP0689252 | Date: | 27.12.1995 | Language: | EN | [1995/52] | Type: | B1 Patent specification | No.: | EP0689252 | Date: | 02.08.2000 | Language: | EN | [2000/31] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 26.09.1995 | Classification | IPC: | H01L29/92 | [1995/52] | CPC: |
H10D1/712 (EP,US);
H10B12/318 (EP,US);
H10D1/711 (EP,US);
H10D1/716 (EP,US);
Y10S438/964 (EP,US)
| Designated contracting states | DE, FR, GB [1995/52] | Title | German: | Halbleitervorrichtung | [1995/52] | English: | Semiconductor device | [1995/52] | French: | Dispositif semi-conducteur | [1995/52] | Examination procedure | 06.07.1995 | Examination requested [1995/52] | 03.03.1998 | Despatch of a communication from the examining division (Time limit: M06) | 11.09.1998 | Reply to a communication from the examining division | 25.10.1999 | Despatch of communication of intention to grant (Approval: Yes) | 29.11.1999 | Communication of intention to grant the patent | 07.01.2000 | Fee for grant paid | 07.01.2000 | Fee for publishing/printing paid | Parent application(s) Tooltip | EP91302414.7 / EP0448374 | Opposition(s) | 03.05.2001 | No opposition filed within time limit [2001/29] | Fees paid | Renewal fee | 06.07.1995 | Renewal fee patent year 03 | 06.07.1995 | Renewal fee patent year 04 | 06.07.1995 | Renewal fee patent year 05 | 25.03.1996 | Renewal fee patent year 06 | 21.03.1997 | Renewal fee patent year 07 | 23.03.1998 | Renewal fee patent year 08 | 22.03.1999 | Renewal fee patent year 09 | 22.03.2000 | Renewal fee patent year 10 |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Cited in | by applicant | "Capacitance-Enhanced Stacked-Capacitor with Engraved Storage Electrode for Deep Submicron DRAMs", SOLID STATE DEVICES AND MATERIALS, 1989, pages 137 - 140 |