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EP0665651
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EP About this file: EP0665651
| EP0665651 - Phased locked loop synthesizer using a digital rate multiplier reference circuit [Right-click to bookmark this link] | Status | The application has been refused Status updated on 11.01.2002 Database last updated on 26.06.2024 | Most recent event Tooltip | 11.01.2002 | Refusal of application | published on 27.02.2002 [2002/09] | Applicant(s) | For all designated states Agilent Technologies, Inc. (A Delaware Corporation) 395 Page Mill Road Palo Alto CA 94303 / US | [N/P] |
| Former [2001/41] | For all designated states Agilent Technologies, Inc. (a Delaware corporation) 395 Page Mill Road Palo Alto, CA 94303 / US | ||
| Former [2001/32] | For all designated states Agilent Technologies Inc. a Delaware Corporation 395 Page Mill Road Palo Alto, CA 94303 / US | ||
| Former [2001/31] | For all designated states Agilent Technologies Inc. a Delaware Corporation 395 Page Mill Road Palo Alto, CA 94303 / US | ||
| Former [2001/14] | For all designated states Agilent Technologies, Inc. 395 Page Mill Road Palo Alto, CA 94303 / US | ||
| Former [2001/13] | For all designated states Hewlett-Packard Company, A Delaware Corporation 3000 Hanover Street Palo Alto, CA 94304 / US | ||
| Former [1995/31] | For all designated states HEWLETT-PACKARD COMPANY 3000 Hanover Street Palo Alto, California 94304-1181 / US | Inventor(s) | 01 /
Davidson, Mark N. 2307 Floral Way Santa Rosa, CA 95403 / US | 02 /
Hillstrom, Timothy L. 11506-21st Place NE Lake Stevens, WA 98258 / US | [1995/31] | Representative(s) | Colgan, Stephen James, et al CARPMAELS & RANSFORD 43 Bloomsbury Square London WC1A 2RA / GB | [N/P] |
| Former [1995/31] | Colgan, Stephen James, et al CARPMAELS & RANSFORD 43 Bloomsbury Square London WC1A 2RA / GB | Application number, filing date | 95300129.4 | 10.01.1995 | [1995/31] | Priority number, date | US19940189521 | 31.01.1994 Original published format: US 189521 | [1995/31] | Filing language | EN | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | EP0665651 | Date: | 02.08.1995 | Language: | EN | [1995/31] | Type: | A3 Search report | No.: | EP0665651 | Date: | 08.11.1995 | Language: | EN | [1995/45] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 18.09.1995 | Classification | IPC: | H03L7/197, H03L7/183 | [1995/45] | CPC: |
H03L7/185 (EP);
H03L7/18 (EP);
H03L7/1806 (EP)
|
| Former IPC [1995/31] | H03L7/197 | Designated contracting states | DE, FR, GB, IT [1995/31] | Title | German: | PLL-Synthetisierer mit einer einen digitalen Rate-Multiplier enthaltenden Referenzschaltung | [1995/31] | English: | Phased locked loop synthesizer using a digital rate multiplier reference circuit | [1995/31] | French: | Synthétiseur de fréquence à boucle de synchronisation de phase comportant un circuit multiplicateur de taux numérique | [1995/31] | Examination procedure | 18.04.1996 | Examination requested [1996/24] | 11.12.1996 | Despatch of a communication from the examining division (Time limit: M06) | 12.06.1997 | Reply to a communication from the examining division | 08.02.1999 | Despatch of a communication from the examining division (Time limit: M06) | 17.08.1999 | Reply to a communication from the examining division | 21.02.2001 | Despatch of communication of intention to grant (Approval: ) | 16.08.2001 | Despatch of communication that the application is refused, reason: formalities examination [2002/09] | 28.08.2001 | Application refused, date of legal effect [2002/09] | 10.10.2001 | Despatch of communication that the application is deemed to be withdrawn, reason: renewal fee not paid in time | Fees paid | Renewal fee | 18.12.1996 | Renewal fee patent year 03 | 22.12.1997 | Renewal fee patent year 04 | 21.12.1998 | Renewal fee patent year 05 | 13.12.1999 | Renewal fee patent year 06 | Penalty fee | Additional fee for renewal fee | 31.01.2001 | 07 M06 Not yet paid |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [XA]US4965533 (GILMORE) [X] 1,2 * column 2, line 30 - line 48 * * column 5, line 14 - column 8, line 54; figure 2 * [A] 5,6,8; | [XP]EP0630129 (ALCATEL SEL AG) [XP] 1,2 * page 6, line 37 - line 52; figure 8 *; | [YA]US3651422 (M. J. UNDERHILL) [Y] 1,2 * column 1, line 73 - column 4, line 23; figure - * [A] 5,8; | [YA]JPS59225619 ; | [A]US3297953 (EVAN T. COLTON) [A] 1,2,5,8 * column 2, line 27 - column 6, line 63; figure - * | [YA] - L. K. REGENBOGEN, "A LOOSE-LOCKED OSCILLATOR", RADIO AND ELECTRONIC ENGINEER, LONDON GB, vol. 48, no. 3, pages 127 - 132 [Y] 1,2 * the whole document * [A] 5-7 | [YA] - PATENT ABSTRACTS OF JAPAN, (19850427), vol. 9, no. 99, Database accession no. (E - 311), & JP59225619 A 19841218 (NIPPON DENKI KK) [Y] 5,8 * abstract * [A] 1,2 | [Y] - OBERMAN R. M. M., Electronic counters, LONDON, GB, MAC MILLAN [Y] 5,8 * page 198 - page 208; figures 9.8-9.12 * |