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EP0715175
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EP About this file: EP0715175
| EP0715175 - Method and apparatus for testing an integrated circuit [Right-click to bookmark this link] | Status | The application has been withdrawn Status updated on 19.04.2002 Database last updated on 14.09.2024 | Most recent event Tooltip | 19.04.2002 | Withdrawal of application | published on 05.06.2002 [2002/23] | Applicant(s) | For all designated states FORD MOTOR COMPANY The American Road Dearborn, MI 48121 / US | [N/P] |
| Former [1996/23] | For all designated states Ford Motor Company The American Road Dearborn, MI 48121 / US | Inventor(s) | 01 /
Walles, Bethany 1492 Pierce Birmingham, Michigan 48009 / US | 02 /
Pham, Cuong 17772 Winchester Northville, Michigan 48167 / US | 03 /
Cibirka, Peter 1752 Sherwood Court Dearborn, Michigan 48124 / US | 04 /
Hayden, Brian 1616 N. Pleasant Royal Oak, Michigan 48067 / US | [1996/23] | Representative(s) | Messulam, Alec Moses, et al Harrison IP Limited 3 Ebor House London Ebor Business Park Millfield Lane Nether Poppleton York YO26 6QY / GB | [N/P] |
| Former [1996/23] | Messulam, Alec Moses, et al A. Messulam & Co. 24 Broadway Leigh on Sea Essex SS9 1BN / GB | Application number, filing date | 95308569.3 | 29.11.1995 | [1996/23] | Priority number, date | US19940348432 | 02.12.1994 Original published format: US 348432 | [1996/23] | Filing language | EN | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | EP0715175 | Date: | 05.06.1996 | Language: | EN | [1996/23] | Type: | A3 Search report | No.: | EP0715175 | Date: | 06.11.1996 | [1996/45] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 17.09.1996 | Classification | IPC: | G01R31/28, G01R1/04, G01R31/316 | [1996/44] | CPC: |
G01R1/0408 (EP,US);
G01R31/2886 (EP,US);
H01L2224/48463 (EP);
H01L2224/859 (EP)
|
| Former IPC [1996/23] | G01R31/28 | Designated contracting states | DE, ES, FR, GB, PT [1996/23] | Title | German: | Verfahren und Apparat zum Testen einer integrierten Schaltung | [2001/51] | English: | Method and apparatus for testing an integrated circuit | [1996/23] | French: | Procédé et appareil pour tester un circuit intégré | [2001/51] |
| Former [1996/23] | Methode und Apparat zum Testen einer integrierter Schaltung | ||
| Former [1996/23] | Méthode et appareil pour tester un circuit intégré | Examination procedure | 15.11.1996 | Examination requested [1997/02] | 12.02.2002 | Despatch of communication of intention to grant (Approval: ) | 09.04.2002 | Application withdrawn by applicant [2002/23] | Fees paid | Renewal fee | 20.10.1997 | Renewal fee patent year 03 | 05.10.1998 | Renewal fee patent year 04 | 29.10.1999 | Renewal fee patent year 05 | 12.10.2000 | Renewal fee patent year 06 | 17.10.2001 | Renewal fee patent year 07 |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [A]EP0475432 (TOSHIBA KK [JP]) [A] 1,12 * claim 4 *; | [A]US4643501 (COFFIN HARRY S [US]) [A] 1-3 * claim 5 *; | [A]JPS6316277 | [A] - PATENT ABSTRACTS OF JAPAN, (19880623), vol. 12, no. 220, & JP63016277 A 19880123 (MITSUBISHI ELECTRIC CORP) [A] 1 * abstract * |