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Extract from the Register of European Patents

EP About this file: EP0806127

EP0806127 - AN ENVIRONMENTALLY DESIRABLE PRINTED CIRCUIT AND ASSOCIATED APPARATUS [Right-click to bookmark this link]
Former [1997/46]AN ENVIRONMENTALLY DESIRABLE METHOD OF MANUFACTURING PRINTED CIRCUITS, PRINTED CIRCUITS MADE THEREBY AND ASSOCIATED APPARATUS
[2001/34]
StatusNo opposition filed within time limit
Status updated on  15.04.2003
Database last updated on 23.04.2024
Most recent event   Tooltip04.01.2008Lapse of the patent in a contracting state
New state(s): IT
published on 06.02.2008  [2008/06]
Applicant(s)For all designated states
RESEARCH ORGANIZATION FOR CIRCUIT KNOWLEDGE
312 Height of Land Road, P.O. Box 180
Grafton, NH 03240 / US
[1997/46]
Inventor(s)01 / ROBERTS, Joseph, A.
312 Height of Land Road, P.O. Box 180
Grafton, NH 03240 / US
[1997/46]
Representative(s)Watts, Peter Graham
Anthony Cundy & Co.
39/41 South Drive
Sutton Coldfield
West Midlands B75 7TE / GB
[N/P]
Former [1997/46]Watts, Peter Graham
Anthony Cundy & Co., 1623 Warwick Road
Knowle, Solihull, West Midlands B93 9LF / GB
Application number, filing date95943682.507.12.1995
[1997/46]
WO1995US15809
Priority number, dateUS1994035885519.12.1994         Original published format: US 358855
[1997/46]
Filing languageEN
Procedural languageEN
PublicationType: A1 Application with search report
No.:WO9619912
Date:27.06.1996
Language:EN
[1996/29]
Type: A1 Application with search report 
No.:EP0806127
Date:12.11.1997
Language:EN
The application published by WIPO in one of the EPO official languages on 27.06.1996 takes the place of the publication of the European patent application.
[1997/46]
Type: B1 Patent specification 
No.:EP0806127
Date:05.06.2002
Language:EN
[2002/23]
Search report(s)International search report - published on:US27.06.1996
(Supplementary) European search report - dispatched on:EP09.03.1999
ClassificationIPC:H05K3/04
[1999/16]
CPC:
H01R31/00 (EP,US); H05K3/045 (EP,US); H05K3/4614 (EP,US);
H05K7/1451 (EP,US); H05K9/0039 (EP,US); H05K1/036 (EP,US);
H05K2201/0195 (EP,US); H05K2201/0355 (EP,US); H05K2201/0367 (EP,US);
H05K2201/0382 (EP,US); H05K2201/0715 (EP,US); H05K2203/025 (EP,US);
H05K2203/063 (EP,US); H05K3/281 (EP,US); H05K3/328 (EP,US);
H05K3/386 (EP,US); H05K3/4647 (EP,US); Y10T29/49155 (EP,US) (-)
Former IPC [1997/46]H05K1/00
Designated contracting statesAT,   BE,   CH,   DE,   DK,   ES,   FR,   GB,   GR,   IE,   IT,   LI,   LU,   MC,   NL,   PT,   SE [1997/46]
TitleGerman:UMWELTFREUNDLICH HERGESTELLTE LEITERPLATTE UND ZUGEHÖRIGE VORRICHTUNG[2001/34]
English:AN ENVIRONMENTALLY DESIRABLE PRINTED CIRCUIT AND ASSOCIATED APPARATUS[2001/34]
French:CIRCUIT IMPRIME FAVORABLE A L'ENVIRONNEMENT ET LE DISPOSITIF ASSOCIE[2001/34]
Former [1997/46]UMWELTFREUNDLICHES VERFAHREN ZUR HERSTELLUNG VON LEITERPLATTEN, SO HERGESTELLTE LEITERPLATTEN UND ZUGEHÖRIGE VORRICHTUNG
Former [1997/46]AN ENVIRONMENTALLY DESIRABLE METHOD OF MANUFACTURING PRINTED CIRCUITS, PRINTED CIRCUITS MADE THEREBY AND ASSOCIATED APPARATUS
Former [1997/46]PROCEDE DE FABRICATION DE CIRCUITS IMPRIMES SANS DANGER POUR L'ENVIRONNEMENT, CES CIRCUITS IMPRIMES ET LE DISPOSITIF ASSOCIE
Entry into regional phase14.07.1997National basic fee paid 
14.07.1997Search fee paid 
14.07.1997Designation fee(s) paid 
14.07.1997Examination fee paid 
Examination procedure02.07.1996Request for preliminary examination filed
International Preliminary Examining Authority: US
14.07.1997Examination requested  [1997/46]
23.08.2001Despatch of communication of intention to grant (Approval: Yes)
03.12.2001Communication of intention to grant the patent
01.03.2002Fee for grant paid
01.03.2002Fee for publishing/printing paid
Opposition(s)06.03.2003No opposition filed within time limit [2003/22]
Fees paidRenewal fee
24.12.1997Renewal fee patent year 03
11.12.1998Renewal fee patent year 04
20.12.1999Renewal fee patent year 05
20.11.2000Renewal fee patent year 06
31.12.2001Renewal fee patent year 07
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See the Register of the Unified Patent Court for opt-out data
Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court.
Lapses during opposition  TooltipAT05.06.2002
BE05.06.2002
CH05.06.2002
GR05.06.2002
IT05.06.2002
LI05.06.2002
NL05.06.2002
DK05.09.2002
PT05.09.2002
SE05.09.2002
GB07.12.2002
LU07.12.2002
IE09.12.2002
ES20.12.2002
[2008/06]
Former [2004/39]AT05.06.2002
BE05.06.2002
CH05.06.2002
GR05.06.2002
LI05.06.2002
NL05.06.2002
DK05.09.2002
PT05.09.2002
SE05.09.2002
GB07.12.2002
LU07.12.2002
IE09.12.2002
ES20.12.2002
Former [2004/22]AT05.06.2002
BE05.06.2002
CH05.06.2002
GR05.06.2002
LI05.06.2002
NL05.06.2002
DK05.09.2002
PT05.09.2002
SE05.09.2002
GB07.12.2002
IE09.12.2002
ES20.12.2002
Former [2004/04]AT05.06.2002
BE05.06.2002
CH05.06.2002
GR05.06.2002
LI05.06.2002
NL05.06.2002
DK05.09.2002
PT05.09.2002
SE05.09.2002
IE09.12.2002
ES20.12.2002
Former [2004/01]AT05.06.2002
BE05.06.2002
CH05.06.2002
GR05.06.2002
LI05.06.2002
NL05.06.2002
DK05.09.2002
PT05.09.2002
SE05.09.2002
IE09.12.2002
Former [2003/48]AT05.06.2002
BE05.06.2002
CH05.06.2002
GR05.06.2002
LI05.06.2002
NL05.06.2002
DK05.09.2002
PT05.09.2002
SE05.09.2002
Former [2003/46]AT05.06.2002
CH05.06.2002
GR05.06.2002
LI05.06.2002
NL05.06.2002
DK05.09.2002
PT05.09.2002
SE05.09.2002
Former [2003/21]AT05.06.2002
CH05.06.2002
GR05.06.2002
LI05.06.2002
NL05.06.2002
PT05.09.2002
SE05.09.2002
Former [2003/20]AT05.06.2002
CH05.06.2002
GR05.06.2002
LI05.06.2002
NL05.06.2002
SE05.09.2002
Former [2003/16]AT05.06.2002
CH05.06.2002
LI05.06.2002
NL05.06.2002
SE05.09.2002
Former [2003/10]AT05.06.2002
NL05.06.2002
SE05.09.2002
Former [2003/09]NL05.06.2002
SE05.09.2002
Former [2002/49]SE05.09.2002
Documents cited:Search[A]GB725115  (ERIE RESISTOR CORP) [A] 11,12,14 * the whole document *;
 [A]US3301730  (LAZARUS SPIWAK, et al) [A] 12,15 * column 3, line 35 - line 61; figures 4-7 *;
 [X]US3410743  (SMITH JR JAMES, et al) [X] 1-3,12,13 * column W *;
 [A]EP0423651  (PICHL FRITZ DIPL ING [CH]) [A] 12,14,15 * figure -; claim - *;
 [A]WO9316574  (ROCK LP [US]) [A] 7,11-15 * page 8, line 32 - page 10, line 16 * * page 18 - page 20, line 18 * * figures 3-6,16-19 *;
 [A]  - T.C. BABCOCK, "Minimizing nicks in active PC conductors", IBM TECHNICAL DISCLOSURE BULLETIN., NEW YORK US, (198305), vol. 25, no. 12, page 6574, XP002082244 [A] 11 * column W *
International search[A]US2427144  (WILHELMUS JANSEN FRANCISCUS JO);
 [A]US2837619  (SAMUEL STEIN);
 [X]US2912745  (STEIGERWALT OLIVER I, et al);
 [A]US2912748  (GRAY ROBERT B);
 [A]US3488890  (OWENS JAMES L, et al);
 [A]US4406062  (NAVARRO JOHN N [US]);
 [A]US5097101  (TROBOUGH DOUGLAS W [US])
The EPO accepts no responsibility for the accuracy of data originating from other authorities; in particular, it does not guarantee that it is complete, up to date or fit for specific purposes.