EP0810731 - Voltage-controlled transistor drive circuit [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 08.04.2005 Database last updated on 07.10.2024 | Most recent event Tooltip | 08.04.2005 | No opposition filed within time limit | published on 25.05.2005 [2005/21] | Applicant(s) | For all designated states MITSUBISHI DENKI KABUSHIKI KAISHA 2-3, Marunouchi 2-chome Chiyoda-ku Tokyo 100 / JP | [N/P] |
Former [1997/49] | For all designated states MITSUBISHI DENKI KABUSHIKI KAISHA 2-3, Marunouchi 2-chome Chiyoda-ku Tokyo 100 / JP | Inventor(s) | 01 /
Mori, Haruyoshi c/o Mitsubishi Denki K.K., 2-3, Marunouchi 2-chome Chiyoda-ku, Tokyo 100 / JP | [1997/49] | Representative(s) | von Fischern, Bernhard, et al Hoffmann - Eitle Patent- und Rechtsanwälte Arabellastrasse 4 81925 München / DE | [N/P] |
Former [1997/49] | Ritter und Edler von Fischern, Bernhard, Dipl.-Ing., et al Hoffmann Eitle, Patent- und Rechtsanwälte, Arabellastrasse 4 81925 München / DE | Application number, filing date | 96118756.4 | 22.11.1996 | [1997/49] | Priority number, date | JP19960133775 | 28.05.1996 Original published format: JP 13377596 | JP19960190719 | 19.07.1996 Original published format: JP 19071996 | [1997/49] | Filing language | EN | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | EP0810731 | Date: | 03.12.1997 | Language: | EN | [1997/49] | Type: | A3 Search report | No.: | EP0810731 | Date: | 21.07.1999 | [1999/29] | Type: | B1 Patent specification | No.: | EP0810731 | Date: | 02.06.2004 | Language: | EN | [2004/23] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 04.06.1999 | Classification | IPC: | H03K17/567, H03K17/687, H03K17/0812 | [1999/29] | CPC: |
H03K17/567 (EP,US);
H03K17/16 (EP,US)
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Former IPC [1997/49] | H03K17/567, H03K17/687 | Designated contracting states | CH, DE, FR, LI [1997/49] | Title | German: | Spannungsgesteuerte Transistor-Treiberschaltung | [1997/49] | English: | Voltage-controlled transistor drive circuit | [1997/49] | French: | Circuit d'attaque de transistor commandé en tension | [1997/49] | Examination procedure | 21.07.1999 | Examination requested [1999/37] | 25.09.2002 | Despatch of a communication from the examining division (Time limit: M04) | 17.12.2002 | Reply to a communication from the examining division | 13.03.2003 | Despatch of a communication from the examining division (Time limit: M04) | 15.07.2003 | Reply to a communication from the examining division | 18.12.2003 | Communication of intention to grant the patent | 22.03.2004 | Fee for grant paid | 22.03.2004 | Fee for publishing/printing paid | Opposition(s) | 03.03.2005 | No opposition filed within time limit [2005/21] | Fees paid | Renewal fee | 26.11.1998 | Renewal fee patent year 03 | 26.11.1999 | Renewal fee patent year 04 | 20.11.2000 | Renewal fee patent year 05 | 26.11.2001 | Renewal fee patent year 06 | 25.11.2002 | Renewal fee patent year 07 | 26.11.2003 | Renewal fee patent year 08 |
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Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [XAY]EP0487964 (SIEMENS AG [DE]) [X] 1-3,5-7,10 * the whole document * [A] 8 [Y] 4,9; | [X]EP0711038 (NIPPON DENSO CO [JP]) [X] 1-3,5-7 * the whole document *; | [Y]EP0631390 (PHILIPS ELECTRONICS UK LTD [GB], et al) [Y] 4,9 * figures 1-6 *; | [A]EP0690572 (FUJI ELECTRIC CO LTD [JP]) | by applicant | JPS6395728 |