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EP0745932
European procedure
Extract from the Register of European Patents
EP About this file: EP0745932
| EP0745932 - Microprocessor supporting variable length instruction execution [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 27.08.2004 Database last updated on 13.09.2024 | Most recent event Tooltip | 17.10.2008 | Change - applicant | published on 19.11.2008 [2008/47] | Applicant(s) | For all designated states MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. 1006, Oaza Kadoma Kadoma-shi Osaka 571-8501 / JP | [2008/47] |
| Former [2003/43] | For all designated states MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. 1006, Oaza Kadoma Kadoma-shi, Osaka 571-0050 / JP | ||
| Former [1996/49] | For all designated states MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. 1006, Oaza Kadoma Kadoma-shi, Osaka 571 / JP | Inventor(s) | 01 /
Matsuzaki, Toshimichi 1-6-7-803, Nishi Aomadani, Mino-shi, Osaka 562 / JP | 02 /
Deguchi, Masashi 3-7-31, Kitatomigaoka Nara-shi, Nara 631 / JP | 03 /
Hamaguchi, Toshifumi 3-19-21, Ankouji-cho Takatsuki-shi, Osaka 569 / JP | 04 /
Tanase, Yutaka 42-14-2-120, Koaza-Hanshowari Oazal-Kusauchi, Tanabe-cho, Tsuzuki-gun / JP | 05 /
Matsumoto, Masahiko 15-5-C, Ninotsubo Shouryu-ji, Nagaokakyo-shi, Kyoto 617 / JP | [1996/49] | Representative(s) | Crawford, Andrew Birkby, et al A.A. Thornton & Co. 235 High Holborn London WC1V 7LE / GB | [N/P] |
| Former [1996/49] | Crawford, Andrew Birkby, et al A.A. THORNTON & CO. Northumberland House 303-306 High Holborn London WC1V 7LE / GB | Application number, filing date | 96303914.4 | 30.05.1996 | [1996/49] | Priority number, date | JP19950133281 | 31.05.1995 Original published format: JP 13328195 | JP19950134078 | 31.05.1995 Original published format: JP 13407895 | [1996/49] | Filing language | EN | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | EP0745932 | Date: | 04.12.1996 | Language: | EN | [1996/49] | Type: | A3 Search report | No.: | EP0745932 | Date: | 09.09.1998 | [1998/37] | Type: | B1 Patent specification | No.: | EP0745932 | Date: | 22.10.2003 | Language: | EN | [2003/43] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 22.07.1998 | Classification | IPC: | G06F9/30, G06F9/34 | [1998/36] | CPC: |
G06F9/3814 (EP,US);
G06F7/00 (KR);
G06F9/30149 (EP,US);
G06F9/30156 (EP,US);
G06F9/30167 (EP,US);
G06F9/30178 (EP,US);
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| Former IPC [1996/49] | G06F9/30 | Designated contracting states | DE, GB, NL [1996/49] | Title | German: | Mikroprozessor zur Ausführung von Befehlen mit variablen Längen | [1996/49] | English: | Microprocessor supporting variable length instruction execution | [1996/49] | French: | Microprocesseur capable d'exécuter des instructions de longueur variable | [1996/49] | Examination procedure | deleted | Decision about request for accelerated examination - accepted: No | 26.02.1999 | Examination requested [1999/17] | 23.03.2001 | Despatch of a communication from the examining division (Time limit: M04) | 14.05.2001 | Reply to a communication from the examining division | 14.05.2001 | Request for accelerated examination filed | 18.07.2001 | Despatch of a communication from the examining division (Time limit: M04) | 26.11.2001 | Reply to a communication from the examining division | 14.03.2002 | Despatch of a communication from the examining division (Time limit: M06) | 24.09.2002 | Reply to a communication from the examining division | 31.01.2003 | Communication of intention to grant the patent | 01.08.2003 | Fee for grant paid | 01.08.2003 | Fee for publishing/printing paid | Divisional application(s) | EP01111215.8 / EP1143333 | Opposition(s) | 23.07.2004 | No opposition filed within time limit [2004/42] | Fees paid | Renewal fee | 11.05.1998 | Renewal fee patent year 03 | 12.05.1999 | Renewal fee patent year 04 | 15.05.2000 | Renewal fee patent year 05 | 14.05.2001 | Renewal fee patent year 06 | 14.05.2002 | Renewal fee patent year 07 | 13.05.2003 | Renewal fee patent year 08 |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [A]EP0184806 (NEC CORP [JP]) [A] 1-7 * the whole document *; | [A]US5043868 (KITAMURA TOSHIAKI [JP], et al) [A] 9,11* column 2, line 13 - column 3, line 45 *; | [XA]EP0499853 (IBM [US]) [X] 9 * page 7, line 16 - page 10, line 8 * [A] 10,13; | [X]US5390358 (SUGINO KOICHI [JP]) [X] 9 * the whole document * | Examination | - COMPUTER ORGANIZATION AND ARCHITECTURE, FIFTH EDITION, William Stallings, Prentice-Hall International, Inc., p. 388-397, 457, 458, publ. 2000 |