blank Quick help
blank Maintenance news

Scheduled maintenance

Regular maintenance outages:
between 05.00 and 05.15 hrs CET (Monday to Sunday).

Other outages
Availability
Register Forum

2022.02.11

More...
blank News flashes

News flashes

New version of the European Patent Register - SPC information for Unitary Patents.

2024-03-06

More...
blank Related links

Extract from the Register of European Patents

EP About this file: EP0750260

EP0750260 - Checkpoint processing in a multiprocessor computer [Right-click to bookmark this link]
StatusThe application is deemed to be withdrawn
Status updated on  23.05.2003
Database last updated on 24.04.2024
Most recent event   Tooltip23.05.2003Application deemed to be withdrawnpublished on 09.07.2003  [2003/28]
Applicant(s)For all designated states
Kabushiki Kaisha Toshiba
72, Horikawa-cho, Saiwai-ku Kawasaki-shi
Kanagawa-ken 210-0913 / JP
[N/P]
Former [1996/52]For all designated states
KABUSHIKI KAISHA TOSHIBA
72, Horikawa-cho, Saiwai-ku
Kawasaki-shi, Kanagawa-ken 210 / JP
Inventor(s)01 / Hoshina, Satoshi, c/o Intell. Prop. Div.
Toshiba Corp., 1-1-1, Shibaura
Minato-ku, Tokyo / JP
02 / Sakai, Hiroshi, c/o Intell. Prop. Div.
Toshiba Corp., 1-1-1, Shibaura
Minato-ku, Tokyo / JP
03 / Kirayama, Hideaki, c/o Intell. Prop. Div.
Toshiba Corp., 1-1-1, Shibaura
Minato-ku, Tokyo / JP
04 / Omori, Msasi, c/o Intell. Prop. Div.
Toshiba Corp., 1-1-1, Shibaura
Minato-ku, Tokyo / JP
05 / Masubuchi, Yoshio, c/o Intell. Prop. Div.
Toshiba Corp., 1-1-1, Shibaura
Minato-ku, Tokyo / JP
06 / Fujii, Takahiro, c/o Intell. Prop. Div.
Toshiba Corp., 1-1-1, Shibaura
Minato-ku, Tokyo / JP
[1996/52]
Representative(s)Brookes IP
Windsor House
6-10 Mount Ephraim Road
Tunbridge Wells, Kent TN1 1EE / GB
[N/P]
Former [2001/29]Brookes Batchellor
102-108 Clerkenwell Road
London EC1M 5SA / GB
Former [1996/52]BATCHELLOR, KIRK & CO.
2 Pear Tree Court Farringdon Road
London EC1R 0DS / GB
Application number, filing date96304434.213.06.1996
[1996/52]
Priority number, dateJP1995015173519.06.1995         Original published format: JP 15173595
JP1995034183927.12.1995         Original published format: JP 34183995
[1996/52]
Filing languageEN
Procedural languageEN
PublicationType: A2 Application without search report 
No.:EP0750260
Date:27.12.1996
Language:EN
[1996/52]
Type: A3 Search report 
No.:EP0750260
Date:23.12.1998
[1998/52]
Search report(s)(Supplementary) European search report - dispatched on:EP11.11.1998
ClassificationIPC:G06F11/14
[1996/52]
CPC:
G06F11/1458 (EP,US); G06F11/14 (KR); G06F15/16 (KR);
G06F12/0806 (EP,US); G06F2201/82 (EP,US)
Designated contracting statesDE,   FR,   GB [1996/52]
TitleGerman:Prüfpunktverarbeitung in einem Multiprozessorrechner[1996/52]
English:Checkpoint processing in a multiprocessor computer[1996/52]
French:Traîtement de point de contrôle dans un ordinateur multiprocesseur[1996/52]
Examination procedure08.07.1996Examination requested  [1996/52]
01.08.2001Despatch of a communication from the examining division (Time limit: M04)
03.12.2001Reply to a communication from the examining division
19.08.2002Communication of intention to grant the patent
30.11.2002Application deemed to be withdrawn, date of legal effect  [2003/28]
05.02.2003Despatch of communication that the application is deemed to be withdrawn, reason: fee for grant / fee for printing not paid in time  [2003/28]
Fees paidRenewal fee
29.06.1998Renewal fee patent year 03
14.06.1999Renewal fee patent year 04
13.06.2000Renewal fee patent year 05
13.06.2001Renewal fee patent year 06
12.06.2002Renewal fee patent year 07
Opt-out from the exclusive  Tooltip
competence of the Unified
Patent Court
See the Register of the Unified Patent Court for opt-out data
Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court.
Documents cited:Search[A]EP0607660  (INT COMPUTERS LTD [GB]) [A] 1,9,15,19-22 * abstract *;
 [A]  - KUN-LUNG WU ET AL, "ERROR RECOVERY IN SHARED MEMORY MULTIPROCESSORS USING PRIVATE CACHES", IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS, (19900401), vol. 1, no. 2, pages 231 - 240, XP000133938 [A] 1,9,15,19-22 * abstract * * page 232, column L, line 40 - page 233, column R, line 39 *

DOI:   http://dx.doi.org/10.1109/71.80134
 [A]  - SOSIC R, "HISTORY CACHE: HARDWARE SUPPORT FOR REVERSE EXECUTION", COMPUTER ARCHITECTURE NEWS, (199412), vol. 22, no. 5, pages 11 - 18, XP000489703 [A] 1,9,15,19-22 * page 12, column L, line 36 - page 13, column R, line 22 * * page 14, column R, line 10 - line 46 *

DOI:   http://dx.doi.org/10.1145/192537.192541
The EPO accepts no responsibility for the accuracy of data originating from other authorities; in particular, it does not guarantee that it is complete, up to date or fit for specific purposes.