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Extract from the Register of European Patents

EP About this file: EP0789388

EP0789388 - Fabrication method for schottky electrodes onto semiconductor devices [Right-click to bookmark this link]
Former [1997/33]Structure and fabrication method for schottky and ohmic electrodes onto semiconductor devices
[2005/06]
StatusNo opposition filed within time limit
Status updated on  25.08.2006
Database last updated on 30.10.2024
Most recent event   Tooltip25.08.2006No opposition filed within time limitpublished on 27.09.2006  [2006/39]
Applicant(s)For all designated states
AGENCY OF INDUSTRIAL SCIENCE AND TECHNOLOGY
3-1, Kasumigaseki 1-chome Chiyoda-ku
Tokyo / JP
[N/P]
Former [2005/42]For all designated states
AGENCY OF INDUSTRIAL SCIENCE AND TECHNOLOGY
3-1, Kasumigaseki 1-chome Chiyoda-ku
Tokyo / JP
Former [1997/33]For all designated states
AGENCY OF INDUSTRIAL SCIENCE AND TECHNOLOGY
3-1, Kasumigaseki 1-chome
Chiyoda-ku Tokyo / JP
Inventor(s)01 / Hara, Shiro
5-528-405, Matsushiro
Tsukuba-shi, Ibaraki / JP
02 / Kajimura, Koji
2-22-28, Higashi
Tsukuba-shi, Ibaraki / JP
03 / Okushi, Hideyo
1-13-30, Sengen
Tsukuba-shi, Ibaraki / JP
04 / Teraji, Tokuyuki
3-19-1, Kasuga
Tsukuba-shi, Ibaraki / JP
[1997/33]
Representative(s)Beresford, Keith Denis Lewis
Beresford Crump LLP
16 High Holborn
London WC1V 6BX / GB
[N/P]
Former [1997/33]Beresford, Keith Denis Lewis
BERESFORD & Co. 2-5 Warwick Court High Holborn
London WC1R 5DJ / GB
Application number, filing date96306139.522.08.1996
[1997/33]
Priority number, dateJP1995021693525.08.1995         Original published format: JP 21693595
JP1996006801825.03.1996         Original published format: JP 6801896
[1997/33]
Filing languageEN
Procedural languageEN
PublicationType: A2 Application without search report 
No.:EP0789388
Date:13.08.1997
Language:EN
[1997/33]
Type: A3 Search report 
No.:EP0789388
Date:16.09.1998
[1998/38]
Type: B1 Patent specification 
No.:EP0789388
Date:19.10.2005
Language:EN
[2005/42]
Search report(s)(Supplementary) European search report - dispatched on:EP29.07.1998
ClassificationIPC:H01L21/285, H01L21/04
[1998/33]
CPC:
H01L29/1608 (EP); H01L21/28537 (KR); H01L21/0485 (EP);
H01L21/0495 (EP); H01L21/28 (EP); H01L29/47 (KR)
Former IPC [1997/33]H01L21/285
Designated contracting statesDE,   FR,   GB [1997/33]
TitleGerman:Herstellungsverfahren von Schottky Elektroden auf Halbleitervorrichtungen[2005/06]
English:Fabrication method for schottky electrodes onto semiconductor devices[2005/06]
French:Procédé de fabrication d'électrodes Schottky sur des dispositifs semi-conducteurs[2005/06]
Former [1997/33]Struktur und Herstellungsverfahren von Schottky und ohmschen Elektroden über Halbleitervorrichtungen
Former [1997/33]Structure and fabrication method for schottky and ohmic electrodes onto semiconductor devices
Former [1997/33]Structure et procédé de fabrication d'électrodes Schottky et ohmiques sur des dispositifs semi-conducteurs
Examination procedure05.03.1999Examination requested  [1999/19]
19.04.1999Amendment by applicant (claims and/or description)
09.04.2002Despatch of a communication from the examining division (Time limit: M04)
19.08.2002Reply to a communication from the examining division
28.04.2003Despatch of a communication from the examining division (Time limit: M06)
07.11.2003Reply to a communication from the examining division
22.03.2005Communication of intention to grant the patent
21.07.2005Fee for grant paid
21.07.2005Fee for publishing/printing paid
Opposition(s)20.07.2006No opposition filed within time limit [2006/39]
Fees paidRenewal fee
20.08.1998Renewal fee patent year 03
23.08.1999Renewal fee patent year 04
24.08.2000Renewal fee patent year 05
23.08.2001Renewal fee patent year 06
29.08.2002Renewal fee patent year 07
20.08.2003Renewal fee patent year 08
19.08.2004Renewal fee patent year 09
18.08.2005Renewal fee patent year 10
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Documents cited:Search[X]US4301592  (LIN HUNG CHANG) [X] 1 * column 2, line 63 - column 3, line 32; figures 2,3 *;
 [X]EP0111364  (PHILIPS NV [NL]) [X] 2,7 * abstract *;
 [X]JPH06333892  ;
 [A]US5087322  (LILLIENFELD DAVID [US], et al) [A] 29 * the whole document *;
 [A]EP0452661  (IBM [US]) [A] * the whole document *;
 [A]US4060820  (PUCEL ROBERT A, et al) [A] * the whole document *;
 [X]  - S. M. SZE, Physics or Semiconductor Devices, NEW YORK, JOHN WILEY & SONS, (1981), XP002068071 [X] 2,5,7,8,17 * page 245 - page 311 *
 [X]  - ADEGBOYEGA G A ET AL, "SCHOTTKY CONTACT BARRIER HEIGHT ENHANCEMENT ON P-TYPE SILICON BY WET CHEMICAL ETCHING", APPLIED PHYSICS A. SOLIDS AND SURFACES, (19890401), vol. A48, no. 4, pages 391 - 395, XP000112320 [X] 20,22 * the whole document *

DOI:   http://dx.doi.org/10.1007/BF00618904
 [X]  - CHANDRIKA NARAYAN, "TUNING OF THE SCHOTTKY BARRIER HEIGHT USING BI-METALLIC LAYERED STRUCTURES", APPLIED PHYSICS LETTERS, (19911111), vol. 59, no. 20, pages 2541 - 2542, XP000330120 [X] 2,5 * the whole document *

DOI:   http://dx.doi.org/10.1063/1.105946
 [X]  - PATENT ABSTRACTS OF JAPAN, (19950428), vol. 095, no. 003, & JP06333892 A 19941202 (FUJI ELECTRIC CORP RES & DEV LTD) [X] 3 * abstract *
 [PX]  - TERAJI T ET AL, "Ohmic contacts to n-type 6H-SiC without post-annealing", III-NITRIDE, SIC AND DIAMOND MATERIALS FOR ELECTRONIC DEVICES. SYMPOSIUM, III-NITRIDE, SOC AND DIAMOND MATERIALS FOR ELECTRONIC DEVICES. SYMPOSIUM, SAN FRANCISO, CA, USA, 8-12 APRIL 1996, 1996, PITTSBURGH, PA, USA, MATER. RES. SOC, USA, pages 149 - 154, XP002068069 [PX] 1-4,9-14,16-20,22,23,25,27,29 * the whole document *
 [PX]  - HARA S ET AL, "Pinning-controlled metal/semiconductor interfaces", THIRD INTERNATIONAL CONFERENCE ON INTELLIGENT MATERIALS. THIRD EUROPEAN CONFERENCE ON SMART STRUCTURES AND MATERIALS, LYON, FRANCE, 3-5 JUNE 1996, ISSN 0277-786X, PROCEEDINGS OF THE SPIE - THE INTERNATIONAL SOCIETY FOR OPTICAL ENGINEERING, 1996, SPIE-INT. SOC. OPT. ENG, USA, vol. 2779, pages 802 - 806, XP002068070 [PX] 1,2,7 * the whole document *

DOI:   http://dx.doi.org/10.1117/12.237058
ExaminationUS5270252
    - T. Teraji et al., Ti Ohmic contact without post-annealing process to n-type 6H-SiC, Institute of Physics Conference Series, No 142, Chapter 3, Paper presented at Silicon Carbide and Related Materials 1995, Kyoto, Japan, 18-21 September 1995
    - VANDERVORST W ET AL, "Advanced Characterisation: an Indispensable Tool for Understanding Ultra Clean Processing", MICROELECTRONIC ENGINEERING, AMSTERDAM, NL, (19950601), vol. 28, no. 1, pages 27 - 34
    - TUCKER J R ET AL: Nanoscale FETs and STM Lithography, HIGH SPEED SEMICONDUCTOR DEVICES AND CIRCUITS, 1995, PROCEEDINGS, IEEE/CORNELL CONFERENCE ON ADVANCED CONCEPTS IN ITHACA, NY, USA, IEEE, US, pages 425-434, 7 August 1995
    - MURARKA S P, "Silicide Thin Films and their Applications in Microelectronics", INTERMETALLICS, GB, (1995), vol. 3, no. 3, pages 173 - 186
    - WATANABE S ET AL, "Homogeneous Hydrogen-terminated Si(111) Surface Formed usng Aqueous HF Soltution and Water", APPLIED PHYSICS LETTERS, NEW YORK, US, (19910916), vol. 59, no. 12, pages 1458 - 1460
The EPO accepts no responsibility for the accuracy of data originating from other authorities; in particular, it does not guarantee that it is complete, up to date or fit for specific purposes.