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EP0780983
European procedure
Extract from the Register of European Patents
EP About this file: EP0780983
| EP0780983 - Voltage level shifter [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 13.09.2002 Database last updated on 12.07.2024 | Most recent event Tooltip | 13.09.2002 | No opposition filed within time limit | published on 30.10.2002 [2002/44] | Applicant(s) | For all designated states LSI Logic Corporation 2001 Danfield Court Fort Collins, CO 80525-2998 / US | [1999/15] |
| Former [1998/18] | For all designated states Symbios, Inc. 2001 Danfield Court Fort Collins, Colorado 80525 / US | ||
| Former [1997/26] | For all designated states SYMBIOS LOGIC INC. 2001 Danfield Court Fort Collins, Colorado 80525 / US | Inventor(s) | 01 /
McManus, Michael J. 1306 Silk Oak Drive Fort Collins, CO 80525 / US | [1997/26] | Representative(s) | Gill, David Alan WP Thompson 138 Fetter Lane London EC4A 1BT / GB | [N/P] |
| Former [1997/26] | Gill, David Alan W.P. Thompson & Co., Celcon House, 289-293 High Holborn London WC1V 7HU / GB | Application number, filing date | 96309222.6 | 17.12.1996 | [1997/26] | Priority number, date | US19950575793 | 22.12.1995 Original published format: US 575793 | [1997/26] | Filing language | EN | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | EP0780983 | Date: | 25.06.1997 | Language: | EN | [1997/26] | Type: | A3 Search report | No.: | EP0780983 | Date: | 09.07.1997 | [1997/28] | Type: | B1 Patent specification | No.: | EP0780983 | Date: | 07.11.2001 | Language: | EN | [2001/45] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 22.05.1997 | Classification | IPC: | H03K19/0185 | [1997/26] | CPC: |
H03K19/018521 (EP,US)
| Designated contracting states | DE, FR, GB [1997/26] | Title | German: | Spannungsregelumsetzer | [1997/26] | English: | Voltage level shifter | [1997/26] | French: | Décaleur de niveau de tension | [1997/26] | Examination procedure | 11.12.1997 | Examination requested [1998/06] | 23.11.1999 | Despatch of a communication from the examining division (Time limit: M06) | 03.07.2000 | Despatch of communication that the application is deemed to be withdrawn, reason: reply to the communication from the examining division not received in time | 21.07.2000 | Reply to a communication from the examining division | 28.08.2000 | Despatch of a communication from the examining division (Time limit: M01) | 13.09.2000 | Reply to a communication from the examining division | 18.12.2000 | Despatch of a communication from the examining division (Time limit: M04) | 20.01.2001 | Reply to a communication from the examining division | 30.03.2001 | Despatch of communication of intention to grant (Approval: Yes) | 30.04.2001 | Communication of intention to grant the patent | 01.08.2001 | Fee for grant paid | 01.08.2001 | Fee for publishing/printing paid | Opposition(s) | 08.08.2002 | No opposition filed within time limit [2002/44] | Request for further processing for: | 21.07.2000 | Request for further processing filed | 21.07.2000 | Full payment received (date of receipt of payment) Request granted | 11.08.2000 | Decision despatched | Fees paid | Renewal fee | 04.12.1998 | Renewal fee patent year 03 | 06.12.1999 | Renewal fee patent year 04 | 07.12.2000 | Renewal fee patent year 05 |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [X]US5243236 (MCDANIEL BART R [US]) [X] 1-4,6,9 * column 4, line 53 - line 55 * * column 5, line 1 - line 3; figures 4,6 *; | [A]US5455526 (RUNAS MICHAEL E [US]) [A] 1,6 * figures 1,2 *; | [DA]US5410267 (HAYCOCK MATTHEW B [US], et al) [DA] 1,6 * figures 4,5 * | [A] - "5-VOLT SIGNAL LEVEL SHIFTER IN A 3-VOLT CMOS CIRCUIT", IBM TECHNICAL DISCLOSURE BULLETIN, (19891201), vol. 32, no. 7, page 454/455, XP000078153 [A] 1,6 * the whole document * | by applicant | US5410267 |