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EP0793173
European procedure
Extract from the Register of European Patents
EP About this file: EP0793173
| EP0793173 - Non-volatile semiconductor storage unit having a correction coding circuit [Right-click to bookmark this link] | |||
| Former [1997/36] | Non-volatile semicon-ductor storage unit having a correction coding circuit | ||
| [2001/22] | Status | No opposition filed within time limit Status updated on 13.12.2002 Database last updated on 20.07.2024 | Most recent event Tooltip | 13.12.2002 | No opposition filed within time limit | published on 29.01.2003 [2003/05] | Applicant(s) | For all designated states NEC Corporation 7-1, Shiba 5-chome Minato-ku Tokyo 108-8001 / JP | [N/P] |
| Former [2002/06] | For all designated states NEC CORPORATION 7-1, Shiba 5-chome, Minato-ku Tokyo / JP | ||
| Former [1997/36] | For all designated states NEC CORPORATION 7-1, Shiba 5-chome Minato-ku Tokyo / JP | Inventor(s) | 01 /
Yoshinogawa, Kunio NEC Corporation, 7-1, Shiba 5-chome Minato-ku, Tokyo / JP | [1997/36] | Representative(s) | Glawe, Delfs, Moll Partnerschaft mbB von Patent- und Rechtsanwälten Postfach 26 01 62 80058 München / DE | [N/P] |
| Former [1997/36] | Glawe, Delfs, Moll & Partner Patentanwälte Postfach 26 01 62 80058 München / DE | Application number, filing date | 97103276.8 | 27.02.1997 | [1997/36] | Priority number, date | JP19960041042 | 28.02.1996 Original published format: JP 4104296 | [1997/36] | Filing language | EN | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | EP0793173 | Date: | 03.09.1997 | Language: | EN | [1997/36] | Type: | A3 Search report | No.: | EP0793173 | Date: | 25.03.1998 | [1998/13] | Type: | B1 Patent specification | No.: | EP0793173 | Date: | 06.02.2002 | Language: | EN | [2002/06] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 06.02.1998 | Classification | IPC: | G06F11/10, G11C29/00 | [1998/12] | CPC: |
G06F11/1008 (EP,US)
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| Former IPC [1997/36] | G06F11/10 | Designated contracting states | DE, FR, IT [1997/36] | Title | German: | Nichtflüchtige Halbleiterspeichereinheit mit Korrektur-Kodierungsschaltung | [1997/36] | English: | Non-volatile semiconductor storage unit having a correction coding circuit | [2001/22] | French: | Dispositif de mémoire non volatile à semi-conducteur avec circuit de codage de correction | [1997/36] |
| Former [1997/36] | Non-volatile semicon-ductor storage unit having a correction coding circuit | Examination procedure | 13.02.1998 | Examination requested [1998/16] | 28.11.2000 | Despatch of a communication from the examining division (Time limit: M04) | 27.03.2001 | Reply to a communication from the examining division | 07.06.2001 | Despatch of communication of intention to grant (Approval: Yes) | 07.08.2001 | Communication of intention to grant the patent | 07.11.2001 | Fee for grant paid | 07.11.2001 | Fee for publishing/printing paid | Opposition(s) | 07.11.2002 | No opposition filed within time limit [2003/05] | Fees paid | Renewal fee | 18.02.1999 | Renewal fee patent year 03 | 21.02.2000 | Renewal fee patent year 04 | 15.02.2001 | Renewal fee patent year 05 |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [A]US4726021 (HORIGUCHI MASASHI [JP], et al) [A] 1-6 * column 6, lines 19-57; figure 10 *; | [A]EP0509485 (NEC CORP [JP]) [A] 1-6* figure 1; claims 1,2 *; | [A] - MICHAEL D. QUINN AND DAVID RICHTER, "Dynamic testing of memory arrays which utilize error checking and correction (ECC) logic", DIGEST OF PAPER 1980 TEST CONFERENCE, NEW YORK, (19800911), pages 238 - 253, XP002051961 [A] 1-6 * page 240, column L, lines 12-37 * |