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EP0820010
European procedure
Extract from the Register of European Patents
EP About this file: EP0820010
| EP0820010 - Method of estimating power consumption of microprocessor [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 26.09.2003 Database last updated on 22.05.2024 | Most recent event Tooltip | 17.02.2006 | Lapse of the patent in a contracting state New state(s): FR | published on 05.04.2006 [2006/14] | Applicant(s) | For all designated states Kabushiki Kaisha Toshiba 72, Horikawa-cho, Saiwai-ku Kawasaki-shi Kanagawa-ken 210-8572 / JP | [N/P] |
| Former [2002/47] | For all designated states KABUSHIKI KAISHA TOSHIBA 72, Horikawa-cho, Saiwai-ku Kawasaki-shi, Kanagawa-ken 210-8572 / JP | ||
| Former [1998/04] | For all designated states KABUSHIKI KAISHA TOSHIBA 72, Horikawa-cho, Saiwai-ku Kawasaki-shi, Kanagawa-ken 210 / JP | Inventor(s) | 01 /
Kageshima, Atsushi 1165-131, Ondacho, Aoba-ku Yokohama-shi, Kanagawa-ken / JP | [1998/04] | Representative(s) | von Fischern, Bernhard, et al Hoffmann - Eitle Patent- und Rechtsanwälte Arabellastrasse 4 81925 München / DE | [N/P] |
| Former [1998/04] | Ritter und Edler von Fischern, Bernhard, Dipl.-Ing., et al Hoffmann Eitle, Patent- und Rechtsanwälte, Arabellastrasse 4 81925 München / DE | Application number, filing date | 97112359.1 | 18.07.1997 | [1998/04] | Priority number, date | JP19960190456 | 19.07.1996 Original published format: JP 19045696 | [1998/04] | Filing language | EN | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | EP0820010 | Date: | 21.01.1998 | Language: | EN | [1998/04] | Type: | A3 Search report | No.: | EP0820010 | Date: | 17.06.1998 | [1998/25] | Type: | B1 Patent specification | No.: | EP0820010 | Date: | 20.11.2002 | Language: | EN | [2002/47] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 08.05.1998 | Classification | IPC: | G06F11/24 | [1998/04] | CPC: |
G06F11/24 (EP,US);
G06F2119/06 (EP,US)
| Designated contracting states | BE, DE, FR, GB [1999/09] |
| Former [1998/04] | AT, BE, CH, DE, DK, ES, FI, FR, GB, GR, IE, IT, LI, LU, MC, NL, PT, SE | Title | German: | Verfahren zur Schätzung des Leistungsverbrauchs eines Mikroprozessors | [1998/04] | English: | Method of estimating power consumption of microprocessor | [1998/04] | French: | Procédé d'estimation de la consommation d'énergie d'un microprocesseur | [1998/04] | Examination procedure | 18.07.1997 | Examination requested [1998/04] | 09.07.2001 | Despatch of a communication from the examining division (Time limit: M04) | 19.11.2001 | Reply to a communication from the examining division | 29.01.2002 | Despatch of communication of intention to grant (Approval: Yes) | 18.06.2002 | Communication of intention to grant the patent | 10.09.2002 | Fee for grant paid | 10.09.2002 | Fee for publishing/printing paid | Opposition(s) | 21.08.2003 | No opposition filed within time limit [2003/46] | Fees paid | Renewal fee | 13.07.1999 | Renewal fee patent year 03 | 12.07.2000 | Renewal fee patent year 04 | 12.07.2001 | Renewal fee patent year 05 | 12.07.2002 | Renewal fee patent year 06 |
| Opt-out from the exclusive Tooltip competence of the Unified Patent Court | See the Register of the Unified Patent Court for opt-out data | ||
| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Lapses during opposition Tooltip | BE | 20.11.2002 | FR | 20.11.2002 | GB | 18.07.2003 | [2006/14] |
| Former [2004/45] | BE | 20.11.2002 | |
| GB | 18.07.2003 | ||
| Former [2003/51] | BE | 20.11.2002 | Documents cited: | Search | [DA] - TIWARI V ET AL, "POWER ANALYSIS OF EMBEDDED SOFTWARE: A FIRST STEP TOWARDS SOFTWARE POWER MINIMIZATION", IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, (199412), vol. 2, no. 4, pages 437 - 445, XP000483631 [DA] 1-5 * abstract * * chapter III * DOI: http://dx.doi.org/10.1109/92.335012 | [A] - LI Y -T S ET AL, "PERFORMANCE ESTIMATION OF EMBEDDED SOFTWARE WITH INSTRUCTION CACHE MODELING", 1995 IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER-AIDED DESIGN (ICCAD), SAN JOSE, NOV. 5 - 9, 1995, INSTITUTE OF ELECTRICAL AND ELECTRONICS ENGINEERS, (19951105), pages 380 - 387, XP000620923 [A] 1-5 * abstract * * page 381, column 1, line 6 - line 26 * * chapter 4, paragraph 4.1 * * chapter 4, paragraph 4.2 * DOI: http://dx.doi.org/10.1109/ICCAD.1995.480144 |