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EP0911982
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EP About this file: EP0911982
| EP0911982 - Reed Solomon error correction with shared memory approach [Right-click to bookmark this link] | Status | The application is deemed to be withdrawn Status updated on 23.06.2000 Database last updated on 11.09.2024 | Most recent event Tooltip | 23.06.2000 | Application deemed to be withdrawn | published on 09.08.2000 [2000/32] | Applicant(s) | For all designated states DEUTSCHE THOMSON-BRANDT GMBH Hermann-Schwer-Strasse 3 78048 Villingen-Schwenningen / DE | [1999/17] | Inventor(s) | 01 /
Rominger, Friedrich Gaisbergring 10 78086 Brigachtal / DE | [1999/17] | Representative(s) | Hartnack, Wolfgang, et al Deutsche Thomson OHG Karl-Wiechert-Allee 1D 30625 Hannover / DE | [N/P] |
| Former [1999/17] | Hartnack, Wolfgang, Dipl.-Ing., et al Deutsche Thomson-Brandt GmbH Licensing & Intellectual Property, Karl-Wiechert-Alee 74 30625 Hannover / DE | Application number, filing date | 97402487.9 | 21.10.1997 | [1999/17] | Filing language | EN | Procedural language | EN | Publication | Type: | A1 Application with search report | No.: | EP0911982 | Date: | 28.04.1999 | Language: | EN | [1999/17] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 25.02.1998 | Classification | IPC: | H03M13/00, G11B20/18 | [1999/17] | CPC: |
G06F11/1008 (EP);
G11B20/1833 (EP);
H03M13/00 (EP);
H03M13/151 (EP)
| Designated contracting states | (deleted) [2000/02] |
| Former [1999/17] | AT, BE, CH, DE, DK, ES, FI, FR, GB, GR, IE, IT, LI, LU, MC, NL, PT, SE | Title | German: | Reed-Solomon-Fehlerkorrektur mit einem gemeinsamen Speicher | [1999/17] | English: | Reed Solomon error correction with shared memory approach | [1999/17] | French: | Correction d'erreurs Reed Solomon utilisant une mémoire partagée | [1999/17] | Examination procedure | 29.10.1999 | Application deemed to be withdrawn, date of legal effect [2000/32] | 01.03.2000 | Despatch of communication that the application is deemed to be withdrawn, reason: examination fee not paid in time [2000/32] | Fees paid | Renewal fee | 22.09.1999 | Renewal fee patent year 03 | Penalty fee | Penalty fee Rule 85a EPC 1973 | 14.12.1999 | AT M01 Not yet paid | 14.12.1999 | BE M01 Not yet paid | 14.12.1999 | CH M01 Not yet paid | 14.12.1999 | DE M01 Not yet paid | 14.12.1999 | DK M01 Not yet paid | 14.12.1999 | ES M01 Not yet paid | 14.12.1999 | FI M01 Not yet paid | 14.12.1999 | FR M01 Not yet paid | 14.12.1999 | GB M01 Not yet paid | 14.12.1999 | GR M01 Not yet paid | 14.12.1999 | IE M01 Not yet paid | 14.12.1999 | IT M01 Not yet paid | 14.12.1999 | LU M01 Not yet paid | 14.12.1999 | MC M01 Not yet paid | 14.12.1999 | NL M01 Not yet paid | 14.12.1999 | PT M01 Not yet paid | 14.12.1999 | SE M01 Not yet paid | Penalty fee Rule 85b EPC 1973 | 14.12.1999 | M01 Not yet paid |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [A]EP0653847 (AT&T CORP.) [A] 1-12 * column 2, line 38 - column 6, line 32; figure 1 *; | [A]US4680764 (SONY CORP.) [A] 2 * column 12, line 37 - column 12, line 45 * | [Y] - K.A. SCHOUHAMER IMMINK, "The Digital Versatile Disc (DVD): System Requirements and Channel Coding", SMPTE JOURNAL, (19960801), pages 483 - 489, XP000627183 [Y] 1-12 * page 485, column 2, line 20 - page 486, column 2, line 12 * | [Y] - H. YAMAUCHI, H. MIYAMOTO, T. SAKAMOTO, T. WATANABE, H. TSUDA AND R. YAMAMURA, "A 24X-SPEED CIRC DECODER FOR A CD-DSP/CD-ROM DECODER LSI", IEEE TRANSACTIONS ON CONSUMER ELECTRONICS, (199708), vol. 43, no. 3, pages 483 - 490, XP002055400 [Y] 1-12 * figure 9 * DOI: http://dx.doi.org/10.1109/30.628662 | [A] - R. NASS, "WHICH INTERFACE CONNECTS THE DISK DRIVE TO A SYSTEM", ELECTRONIC DESIGN, CLEVELAND, OH, US, (19950724), vol. 43, no. 15, page 57,58,60,62,67,68, XP000531745 [A] 7,9 * page 57, column 1, line 1 - page 60, column 2, line 26 * | [A] - R.H.J. BLOKS, "THE IEEE-1394 HIGH SPEED SERIAL BUS", PHILIPS JOURNAL OF RESEARCH, (1996), vol. 50, no. 1/2, pages 209 - 216, XP002055401 [A] 8 * page 209, line 1 - page 216, line L * DOI: http://dx.doi.org/10.1016/0165-5817(96)81310-6 | [A] - S.B. WICKER AND V. BHARGAVA, EDS., ALGORITHMS AND ARCHITECTURES FOR THE DESIGN OF A VLSI REED-SOLOMON CODEC, PISCATAWAY, NJ, IEEE PRESS, (1994), XP002055402 [A] 2 * page 60, line 1 - page 107, line L * |