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EP0945788
European procedure
Extract from the Register of European Patents
EP About this file: EP0945788
| EP0945788 - Data processing system with digital signal processor core and co-processor and data processing method [Right-click to bookmark this link] | |||
| Former [1999/39] | Data processing system with digital signal processor core and co-processor | ||
| [2003/40] | Status | No opposition filed within time limit Status updated on 10.06.2005 Database last updated on 02.07.2024 | Most recent event Tooltip | 11.07.2008 | Change - representative | published on 13.08.2008 [2008/33] | Applicant(s) | For all designated states TEXAS INSTRUMENTS INC. P.O. Box 655474 13500 North Central Expressway Dallas, Texas 75265 / US | [N/P] |
| Former [2004/02] | For all designated states Texas Instruments Inc. P.O. Box 655474 13500 North Central Expressway Dallas, Texas 75265 / US | ||
| Former [1999/39] | For all designated states TEXAS INSTRUMENTS INCORPORATED P.O. Box 655474, 13500 Central Expressway Dallas, TX 75265 / US | Inventor(s) | 01 /
Hocevar, Dale E. 3408 Sherrye Drive Plano Texas 75074 / US | 02 /
Gatherer, Allan 2105 Bluebonnet Drive Richardson, Texas 75082 / US | 03 /
Lemonds, Karl E. Jr. 3322 Castle Rock Garland, Texas 75044 / US | 04 /
Hung, Ching-Yu 4633 Baldwin Lane Plano, Texas 75024 / US | [2004/11] |
| Former [1999/39] | 01 /
Hocevar, Dale E. 3408 Sherrye Drive Richardson, Texas 75074 / US | ||
| 02 /
Gatherer, Allan 2105 Bluebonnet Drive Richardson, Texas 75082 / US | |||
| 03 /
Lemonds, Karl E. Jr. 3322 Castle Rock Garland, Texas 75044 / US | |||
| 04 /
Hung, Ching-Yu 4633 Baldwin Lane Plano, Texas 75024 / US | Representative(s) | Holt, Michael Texas Instruments Limited European Patent Department 3rd Floor 401 Grafton Gate Milton Keynes MK9 1AQ / GB | [N/P] |
| Former [2008/33] | Holt, Michael Texas Instruments Limited European Patents Department 800 Pavilion Drive Northampton NN4 7YL / GB | ||
| Former [1999/39] | Holt, Michael Texas Instruments Ltd., PO Box 5069 Northampton, Northamptonshire NN4 7ZE / GB | Application number, filing date | 99200311.1 | 03.02.1999 | [1999/39] | Priority number, date | US19980073668P | 04.02.1998 Original published format: US 73668 P | [1999/39] | Filing language | EN | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | EP0945788 | Date: | 29.09.1999 | Language: | EN | [1999/39] | Type: | A3 Search report | No.: | EP0945788 | Date: | 26.06.2002 | [2002/26] | Type: | B1 Patent specification | No.: | EP0945788 | Date: | 04.08.2004 | Language: | EN | [2004/32] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 14.05.2002 | Classification | IPC: | G06F9/38 | [1999/39] | CPC: |
G06F9/3879 (EP,US);
G06F9/30 (KR);
G06F9/3897 (EP,US)
| Designated contracting states | DE, FR, GB, IT, NL [2003/12] |
| Former [1999/39] | AT, BE, CH, CY, DE, DK, ES, FI, FR, GB, GR, IE, IT, LI, LU, MC, NL, PT, SE | Title | German: | Datenverarbeitungssytem mit einem digitalen Signalprozessor und einem Koprozessor und Datenverarbeitungsverfahren | [2003/40] | English: | Data processing system with digital signal processor core and co-processor and data processing method | [2003/40] | French: | Système de traitement de données avec un processeur de signaux numériques et un processeur auxiliaire et méthode de traitement de données | [2003/40] |
| Former [1999/39] | Datenverarbeitungssytem mit einem digitalen Signalprozessor und einem Koprozessor | ||
| Former [1999/39] | Data processing system with digital signal processor core and co-processor | ||
| Former [1999/39] | Système de traitement de données avec un processeur de signaux numériques et un processeur auxiliaire | Examination procedure | 27.12.2002 | Examination requested [2003/10] | 17.03.2003 | Despatch of a communication from the examining division (Time limit: M04) | 22.07.2003 | Reply to a communication from the examining division | 27.01.2004 | Communication of intention to grant the patent | 07.06.2004 | Fee for grant paid | 07.06.2004 | Fee for publishing/printing paid | Opposition(s) | 06.05.2005 | No opposition filed within time limit [2005/30] | Fees paid | Renewal fee | 28.02.2001 | Renewal fee patent year 03 | 28.02.2002 | Renewal fee patent year 04 | 28.02.2003 | Renewal fee patent year 05 | 01.03.2004 | Renewal fee patent year 06 |
| Opt-out from the exclusive Tooltip competence of the Unified Patent Court | See the Register of the Unified Patent Court for opt-out data | ||
| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Lapses during opposition Tooltip | IT | 04.08.2004 | NL | 04.08.2004 | [2008/17] |
| Former [2006/24] | NL | 04.08.2004 | Documents cited: | Search | [Y]EP0758123 (QUALCOMM INC [US]) [Y] 1-13 * page 3, line 56 - page 4, column 5; figures 1,6A *; | [Y]US5420989 (MAHER III ROBERT D [US], et al) [Y] 1-13 * column 2, line 1 - line 18; figures 1,2 * * column 2, line 42 - column 4, line 57 *; | [A]EP0653848 (AT & T CORP [US]) [A] 1,10 * column 2, line 18 - line 25; figure 1 *; | [A]US5418976 (IIDA KOUICHI [JP]) [A] 1,10 * column 1, line 60 - column 2, line 8 * | [Y] - HERRMANN D ET AL, "High speed video board as a case study for hardware-software co-design", PROCEEDINGS OF THE INTERNATIONAL CONFERENCE ON COMPUTER DESIGN. ICCD. VLSI IN COMPUTERS AND PROCESSORS. AUSTIN, OCT. 7 - 9, 1996, LOS ALAMITOS, IEEE COMP. SOC. PRESS, US, (19961007), ISBN 0-8186-7554-3, pages 185 - 190, XP010201800 [Y] 1,10 * the whole document * DOI: http://dx.doi.org/10.1109/ICCD.1996.563556 | [A] - KIM W-H ET AL, "DESIGN AND IMPLEMENTATION OF MPEG-2/DVB SCRAMBLER UNIT AND VLSI CHIP", IEEE TRANSACTIONS ON CONSUMER ELECTRONICS, IEEE INC. NEW YORK, US, (19970801), vol. 43, no. 3, ISSN 0098-3063, pages 980 - 984, XP000742588 [A] 1,10 * the whole document * DOI: http://dx.doi.org/10.1109/30.628778 |