Extract from the Register of European Patents

EP About this file: EP0936552

EP0936552 - Pseudo precise I-cache inclusivity for vertical caches [Right-click to bookmark this link]
StatusNo opposition filed within time limit
Status updated on  30.03.2007
Database last updated on 11.04.2026
Most recent event   Tooltip21.03.2008Lapse of the patent in a contracting state
New state(s): IT
published on 23.04.2008  [2008/17]
Applicant(s)For all designated states
International Business Machines Corporation
New Orchard Road
Armonk, NY 10504 / US
[N/P]
Former [2006/17]For all designated states
International Business Machines Corporation
New Orchard Road
Armonk, N.Y. 10504 / US
Former [1999/33]For all designated states
International Business Machines Corporation
Old Orchard Road
Armonk, N.Y. 10504 / US
Inventor(s)01 / Arimilli, Ravi Kumar
9221 Spicebrush Drive
Austin, Texas 78759 / US
02 / Dodson, John Steven
1205 Bell Rock Circle
Pflugerville, Texas 78660 / US
[1999/33]
Representative(s)Burt, Roger James, et al
IBM United Kingdom Limited Intellectual Property Department Hursley Park Winchester
Hampshire SO21 2JN / GB
[N/P]
Former [1999/37]Burt, Roger James, Dr., et al
IBM United Kingdom Limited Intellectual Property Department Hursley Park
Winchester Hampshire SO21 2JN / GB
Former [1999/33]Burrington, Alan Graham Headford
Alan Burrington & Associates 41 The Street Ashtead
Surrey KT21 1AA / GB
Application number, filing date99301051.115.02.1999
[1999/33]
Priority number, dateUS1998002432117.02.1998         Original published format: US 24321
[1999/33]
Filing languageEN
Procedural languageEN
PublicationType: A2 Application without search report 
No.:EP0936552
Date:18.08.1999
Language:EN
[1999/33]
Type: A3 Search report 
No.:EP0936552
Date:22.09.1999
[1999/38]
Type: B1 Patent specification 
No.:EP0936552
Date:26.04.2006
Language:EN
[2006/17]
Search report(s)(Supplementary) European search report - dispatched on:EP11.08.1999
ClassificationIPC:G06F12/08
[1999/33]
CPC:
G06F12/0811 (EP,US); G06F12/08 (KR)
Designated contracting statesBE,   CH,   DE,   ES,   FR,   GB,   IE,   IT,   LI,   NL,   SE [2000/22]
Former [1999/33]AT,  BE,  CH,  CY,  DE,  DK,  ES,  FI,  FR,  GB,  GR,  IE,  IT,  LI,  LU,  MC,  NL,  PT,  SE 
TitleGerman:Pseudo-genaue I-Cache-Speichereinschliessbarkeit für vertikale Cache-Speicher[1999/33]
English:Pseudo precise I-cache inclusivity for vertical caches[1999/33]
French:Inclusivité pseudo précise d'antémémoire d'instructions pour des antémémoires verticales[1999/33]
Examination procedure17.03.2000Examination requested  [2000/20]
23.03.2000Loss of particular rights, legal effect: designated state(s)
07.07.2000Despatch of communication of loss of particular rights: designated state(s) AT, CY, DK, FI, GR, LU, MC, PT
15.12.2000Despatch of a communication from the examining division (Time limit: M04)
14.04.2001Reply to a communication from the examining division
24.06.2002Despatch of a communication from the examining division (Time limit: M04)
29.10.2002Reply to a communication from the examining division
17.10.2005Communication of intention to grant the patent
16.01.2006Fee for grant paid
16.01.2006Fee for publishing/printing paid
Opposition(s)29.01.2007No opposition filed within time limit [2007/18]
Fees paidRenewal fee
15.02.2001Renewal fee patent year 03
14.02.2002Renewal fee patent year 04
13.02.2003Renewal fee patent year 05
16.02.2004Renewal fee patent year 06
15.02.2005Renewal fee patent year 07
15.02.2006Renewal fee patent year 08
Penalty fee
Penalty fee Rule 85a EPC 1973
27.04.2000AT   M01   Not yet paid
27.04.2000CY   M01   Not yet paid
27.04.2000DK   M01   Not yet paid
27.04.2000FI   M01   Not yet paid
27.04.2000GR   M01   Not yet paid
27.04.2000LU   M01   Not yet paid
27.04.2000MC   M01   Not yet paid
27.04.2000PT   M01   Not yet paid
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Lapses during opposition  TooltipBE26.04.2006
CH26.04.2006
IT26.04.2006
LI26.04.2006
NL26.04.2006
SE26.07.2006
ES06.08.2006
[2008/17]
Former [2007/21]BE26.04.2006
CH26.04.2006
LI26.04.2006
NL26.04.2006
SE26.07.2006
ES06.08.2006
Former [2007/03]CH26.04.2006
LI26.04.2006
SE26.07.2006
ES06.08.2006
Former [2006/50]SE26.07.2006
ES06.08.2006
Former [2006/49]SE26.07.2006
Documents cited:Search[Y] EP0681241  (COMPAQ COMPUTER CORP et al.) [Y] 1-10 * page 4, line 2 - page 5, line 5; figure 2 *
 [Y]   DEVILLE Y: "A PROCESS-DEPENDENT PARTITIONING STRATEGY FOR CACHE MEMORIES", COMPUTER ARCHITECTURE NEWS, vol. 21, no. 1, 1 March 1993 (1993-03-01), pages 26 - 33, XP000355625, ISSN: 0163-5964 [Y] 1-10 * page 27, column L, line 4 - line 15 *

DOI:   http://dx.doi.org/10.1145/152479.152483
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