EP0972300 - METHOD OF MANUFACTURING INTEGRATED CIRCUITS [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 05.01.2007 Database last updated on 24.04.2024 | Most recent event Tooltip | 21.03.2008 | Lapse of the patent in a contracting state New state(s): IT | published on 23.04.2008 [2008/17] | Applicant(s) | For all designated states Koninklijke Philips Electronics N.V. Groenewoudseweg 1 5621 BA Eindhoven / NL | [N/P] |
Former [2006/09] | For all designated states Koninklijke Philips Electronics, N.V. Groenewoudseweg 1 5621 BA Eindhoven / NL | ||
Former [2000/03] | For all designated states Koninklijke Philips Electronics N.V. Groenewoudseweg 1 5621 BA Eindhoven / NL | Inventor(s) | 01 /
NAGASWAMI, Venkat, R. Prof. Holstlaan 6 NL-5656 AA Eindhoven / NL | 02 /
VAN GESSEL, Johannes, G. Prof. Holstlaan 6 NL-5656 AA Eindhoven / NL | 03 /
VAN WEZEP, Dries, A. Prof. Holstlaan 6 NL-5656 AA Eindhoven / NL | [2000/03] | Representative(s) | Duijvestijn, Adrianus Johannes, et al Philips Intellectual Property & Standards High Tech Campus 5 5656 AE Eindhoven / NL | [N/P] |
Former [2001/22] | Duijvestijn, Adrianus Johannes, et al Internationaal Octrooibureau B.V., Prof. Holstlaan 6 5656 AA Eindhoven / NL | ||
Former [2000/03] | de Haas, Laurens Johan INTERNATIONAAL OCTROOIBUREAU B.V., Prof. Holstlaan 6 5656 AA Eindhoven / NL | Application number, filing date | 99900602.6 | 28.01.1999 | [2000/03] | WO1999IB00157 | Priority number, date | EP19980200413 | 10.02.1998 Original published format: EP 98200413 | [2000/03] | Filing language | EN | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | WO9941774 | Date: | 19.08.1999 | Language: | EN | [1999/33] | Type: | A2 Application without search report | No.: | EP0972300 | Date: | 19.01.2000 | Language: | EN | The application published by WIPO in one of the EPO official languages on 19.08.1999 takes the place of the publication of the European patent application. | [2000/03] | Type: | B1 Patent specification | No.: | EP0972300 | Date: | 01.03.2006 | Language: | EN | [2006/09] | Search report(s) | International search report - published on: | SE | 28.10.1999 | Classification | IPC: | H01L21/02 | [2000/03] | CPC: |
H01L21/67288 (EP,US);
H01L22/20 (EP,US)
| Designated contracting states | DE, FR, GB, IT, NL [2000/03] | Title | German: | VERFAHREN ZUR HERSTELLUNG VON INTEGRIERTEN SCHALTUNGEN | [2000/03] | English: | METHOD OF MANUFACTURING INTEGRATED CIRCUITS | [2000/03] | French: | PROCEDE DE FABRICATION DE CIRCUITS INTEGRES | [2000/03] | Entry into regional phase | 10.11.1999 | National basic fee paid | 10.11.1999 | Designation fee(s) paid | 10.11.1999 | Examination fee paid | Examination procedure | 10.11.1999 | Examination requested [2000/03] | 09.05.2005 | Despatch of a communication from the examining division (Time limit: M04) | 13.06.2005 | Reply to a communication from the examining division | 19.07.2005 | Communication of intention to grant the patent | 29.11.2005 | Fee for grant paid | 29.11.2005 | Fee for publishing/printing paid | Opposition(s) | 04.12.2006 | No opposition filed within time limit [2007/06] | Fees paid | Renewal fee | 31.01.2001 | Renewal fee patent year 03 | 31.01.2002 | Renewal fee patent year 04 | 31.01.2003 | Renewal fee patent year 05 | 02.02.2004 | Renewal fee patent year 06 | 31.01.2005 | Renewal fee patent year 07 | 31.01.2006 | Renewal fee patent year 08 |
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Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Lapses during opposition Tooltip | IT | 01.03.2006 | NL | 01.03.2006 | [2008/17] |
Former [2006/45] | NL | 01.03.2006 | Cited in | International search | [A]US5537325 (IWAKIRI EIJI [JP], et al); | [A]US5694325 (FUKUDA ETSUO [JP], et al); | [AP]US5862055 (CHEN MING CHUN [US], et al) |