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EP1062618
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EP About this file: EP1062618
| EP1062618 - NON-LOT BASED METHOD FOR ASSEMBLING INTEGRATED CIRCUIT DEVICES [Right-click to bookmark this link] | Status | The application is deemed to be withdrawn Status updated on 29.06.2012 Database last updated on 29.03.2025 | Most recent event Tooltip | 29.06.2012 | Application deemed to be withdrawn | published on 01.08.2012 [2012/31] | Applicant(s) | For all designated states Micron Technology, Inc. 8000 South Federal Way Boise, ID 83706 / US | [N/P] |
| Former [2000/52] | For all designated states Micron Technology, Inc. 8000 South Federal Way Boise, ID 83706 / US | Inventor(s) | 01 /
WILSON, Kevin 2234 South Longmont Avenue Boise, ID 83706 / US | 02 /
HJORTH, Ron 2606 South Tagish Way Meridan ID 83642 / US | [2001/12] |
| Former [2000/52] | 01 /
WILSON, Kevin 2234 South Longmont Avenue Boise, ID 83706 / US | ||
| 02 /
HJORTH, Ron 11828 Arch Street Boise, ID 83713 / US | Representative(s) | Prins, Adrianus Willem, et al V.O. Johan de Wittlaan 7 2517 JR Den Haag / NL | [N/P] |
| Former [2000/52] | Prins, Adrianus Willem, et al Vereenigde, Nieuwe Parklaan 97 2587 BN Den Haag / NL | Application number, filing date | 99904416.7 | 29.01.1999 | [2000/52] | WO1999US01916 | Priority number, date | US19980027144 | 20.02.1998 Original published format: US 27144 | [2000/52] | Filing language | EN | Procedural language | EN | Publication | Type: | A1 Application with search report | No.: | WO9942945 | Date: | 26.08.1999 | Language: | EN | [1999/34] | Type: | A1 Application with search report | No.: | EP1062618 | Date: | 27.12.2000 | Language: | EN | The application published by WIPO in one of the EPO official languages on 26.08.1999 takes the place of the publication of the European patent application. | [2000/52] | Search report(s) | International search report - published on: | US | 26.08.1999 | (Supplementary) European search report - dispatched on: | EP | 09.12.2005 | Classification | IPC: | H01L21/00 | [2006/04] | CPC: |
H01L21/67294 (EP,US);
H10D62/57 (KR);
G05B19/4183 (EP,US);
H01L21/67276 (EP,US);
H01L23/544 (EP,US);
G05B2219/31307 (EP,US);
G05B2219/36371 (EP,US);
G05B2219/45031 (EP,US);
H01L2223/5444 (EP,US);
H01L2223/54473 (EP,US);
H01L2223/5448 (EP,US);
H01L2223/54486 (EP,US);
| C-Set: |
H01L2924/0002, H01L2924/00 (EP,US)
|
| Former IPC [2000/52] | G06K1/00 | Designated contracting states | AT, BE, CH, CY, DE, DK, ES, FI, FR, GB, GR, IE, IT, LI, LU, MC, NL, PT, SE [2000/52] | Title | German: | NICHT LOTBASIERTES VERFAHREN ZUM ZUSAMMENSETZEN VON INTEGRIERTEN KREISLAUFVORRICHTUNGEN | [2000/52] | English: | NON-LOT BASED METHOD FOR ASSEMBLING INTEGRATED CIRCUIT DEVICES | [2000/52] | French: | PROCEDE D'ASSEMBLAGE HORS LOT DE DISPOSITIFS A CIRCUIT INTEGRE | [2000/52] | Entry into regional phase | 10.08.2000 | National basic fee paid | 10.08.2000 | Search fee paid | 10.08.2000 | Designation fee(s) paid | 10.08.2000 | Examination fee paid | Examination procedure | 20.09.1999 | Request for preliminary examination filed International Preliminary Examining Authority: US | 10.08.2000 | Examination requested [2000/52] | 15.05.2006 | Despatch of a communication from the examining division (Time limit: M06) | 27.11.2006 | Reply to a communication from the examining division | 22.03.2007 | Despatch of communication that the application is refused, reason: substantive examination {1} | 30.07.2009 | Despatch of a communication from the examining division (Time limit: M06) | 09.02.2010 | Reply to a communication from the examining division | 17.01.2011 | Despatch of a communication from the examining division (Time limit: M04) | 10.05.2011 | Reply to a communication from the examining division | 22.09.2011 | Communication of intention to grant the patent | 03.02.2012 | Application deemed to be withdrawn, date of legal effect [2012/31] | 15.03.2012 | Despatch of communication that the application is deemed to be withdrawn, reason: fee for grant / fee for printing not paid in time [2012/31] | Appeal following examination | 14.05.2007 | Appeal received No. T1232/07 | 05.07.2007 | Statement of grounds filed | 27.09.2007 | Result of appeal procedure: continuation of examination procedure | Divisional application(s) | The date of the Examining Division's first communication in respect of the earliest application for which a communication has been issued is 15.05.2006 | Fees paid | Renewal fee | 02.02.2001 | Renewal fee patent year 03 | 21.01.2002 | Renewal fee patent year 04 | 20.01.2003 | Renewal fee patent year 05 | 26.01.2004 | Renewal fee patent year 06 | 20.01.2005 | Renewal fee patent year 07 | 27.01.2006 | Renewal fee patent year 08 | 29.01.2007 | Renewal fee patent year 09 | 25.01.2008 | Renewal fee patent year 10 | 30.01.2009 | Renewal fee patent year 11 | 25.01.2010 | Renewal fee patent year 12 | 14.01.2011 | Renewal fee patent year 13 | Penalty fee | Additional fee for renewal fee | 01.02.2001 | 03 M06 Fee paid on 02.02.2001 | 31.01.2012 | 14 M06 Not yet paid |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [X]US5399531 (WU H J [TW]); | [PX]WO9843191 (MICRON TECHNOLOGY INC [US]); | [PX]US5844803 (BEFFA RAYMOND J [US]) | International search | [Y]US4454413 (MORTON JR WILLIAM D [US]); | [Y]US4510673 (SHILS ALAN J [US], et al); | [Y]US4985988 (LITTLEBURY HUGH W [US]); | [Y]US5294812 (HASHIMOTO KAZUHIKO [JP], et al); | [Y]JPH09229999 (TOSHIBA MICRO ELECTRONICS, et al); | [YP]US5801067 (SHAW RONALD [US], et al); | [YP]US5805472 (FUKASAWA YOSHIHITO [JP]); | by applicant | US5399531 |