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EP1008187
European procedure
Extract from the Register of European Patents
EP About this file: EP1008187
| EP1008187 - SEMICONDUCTOR DEVICE HAVING A RECTIFYING JUNCTION AND METHOD OF MANUFACTURING SAME [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 30.07.2010 Database last updated on 05.10.2024 | Most recent event Tooltip | 01.10.2010 | Lapse of the patent in a contracting state | published on 03.11.2010 [2010/44] | Applicant(s) | For all designated states NXP B.V. High Tech Campus 60 5656 AG Eindhoven / NL | [2007/31] |
| Former [2000/24] | For all designated states Koninklijke Philips Electronics N.V. Groenewoudseweg 1 5621 BA Eindhoven / NL | Inventor(s) | 01 /
BROWN, Adam R. Prof. Holstlaan 6 NL-5656 AA Eindhoven / NL | 02 /
HURKX, Godefridus, A., M. Prof. Holstlaan 6 NL-5656 AA Eindhoven / NL | 03 /
PETER, Michael, S. Prof. Holstlaan 6 NL-5656 AA Eindhoven / NL | 04 /
HUIZING, Hendrik, G., A. Prof. Holstlaan 6 NL-5656 AA Eindhoven / NL | 05 /
DE BOER, Wiebe, B. Prof. Holstlaan 6 NL-5656 AA Eindhoven / NL | [2000/24] | Representative(s) | Schouten, Marcus Maria, et al NXP B.V. Intellectual Property & Licensing High Tech Campus 60 5656 AG Eindhoven / NL | [N/P] |
| Former [2009/44] | Schouten, Marcus Maria, et al NXP B.V. IP & L Department High Tech Campus 32 5656 AE Eindhoven / NL | ||
| Former [2008/14] | van der Veer, Johannis Leendert, et al NXP Semiconductors Intellectual Property Department High Tech Campus 60 5656 AG Eindhoven / NL | ||
| Former [2007/02] | Pennings, Johannes, et al NXP Semiconductors Intellectual Property Department High Tech Campus 60 5656 AG Eindhoven / NL | ||
| Former [2002/18] | Duijvestijn, Adrianus Johannes, et al Internationaal Octrooibureau B.V., Prof. Holstlaan 6 5656 AA Eindhoven / NL | ||
| Former [2000/24] | Smeets, Eugenius Theodorus J. M., et al INTERNATIONAAL OCTROOIBUREAU B.V., Prof. Holstlaan 6 5656 AA Eindhoven / NL | Application number, filing date | 99909139.0 | 01.04.1999 | [2000/24] | WO1999IB00567 | Priority number, date | EP19980201133 | 09.04.1998 Original published format: EP 98201133 | [2000/24] | Filing language | EN | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | WO9953553 | Date: | 21.10.1999 | Language: | EN | [1999/42] | Type: | A2 Application without search report | No.: | EP1008187 | Date: | 14.06.2000 | Language: | EN | The application published by WIPO in one of the EPO official languages on 21.10.1999 takes the place of the publication of the European patent application. | [2000/24] | Type: | B1 Patent specification | No.: | EP1008187 | Date: | 23.09.2009 | Language: | EN | [2009/39] | Search report(s) | International search report - published on: | SE | 20.01.2000 | Classification | IPC: | H01L29/861 | [2000/24] | CPC: |
H01L29/885 (EP,US);
H01L29/32 (EP,US);
Y10S438/979 (EP,US)
| Designated contracting states | DE, FR, GB, NL [2000/24] | Title | German: | HALBLEITER MIT GLEICHRICHTENDEM ÜBERGANG UND SEINE HERSTELLUNG | [2000/24] | English: | SEMICONDUCTOR DEVICE HAVING A RECTIFYING JUNCTION AND METHOD OF MANUFACTURING SAME | [2000/24] | French: | DISPOSITIF A SEMI-CONDUCTEUR AYANT UNE JONCTION DE REDRESSEMENT ET SON PROCEDE DE PRODUCTION | [2000/24] | Entry into regional phase | 10.01.2000 | National basic fee paid | 10.01.2000 | Designation fee(s) paid | 20.07.2000 | Examination fee paid | Examination procedure | 20.07.2000 | Examination requested [2000/37] | 03.08.2006 | Despatch of a communication from the examining division (Time limit: M06) | 31.01.2007 | Reply to a communication from the examining division | 31.07.2007 | Despatch of a communication from the examining division (Time limit: M04) | 11.09.2007 | Reply to a communication from the examining division | 22.09.2008 | Cancellation of oral proceeding that was planned for 15.10.2008 | 22.09.2008 | Minutes of oral proceedings despatched | 15.10.2008 | Date of oral proceedings | 15.10.2008 | Date of oral proceedings (cancelled) | 21.04.2009 | Communication of intention to grant the patent | 05.08.2009 | Fee for grant paid | 05.08.2009 | Fee for publishing/printing paid | Opposition(s) | 24.06.2010 | No opposition filed within time limit [2010/35] | Fees paid | Renewal fee | 02.05.2001 | Renewal fee patent year 03 | 02.05.2002 | Renewal fee patent year 04 | 02.05.2003 | Renewal fee patent year 05 | 03.05.2004 | Renewal fee patent year 06 | 02.05.2005 | Renewal fee patent year 07 | 02.05.2006 | Renewal fee patent year 08 | 02.05.2007 | Renewal fee patent year 09 | 02.05.2008 | Renewal fee patent year 10 | 04.05.2009 | Renewal fee patent year 11 |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Lapses during opposition Tooltip | NL | 23.09.2009 | [2010/44] | Cited in | International search | [A]US4111719 (MADER SIEGFRIED R, et al); | [A]US5342805 (CHAN JOSEPH Y [US], et al); | [AP]WO9852230 (KONINKL PHILIPS ELECTRONICS NV [NL], et al) | Examination | FR2080988 | JPS63141376 | EP0311816 | EP0350816 | US5338942 | WO9708754 | - KAMINS T.I. ET AL, "Electrical and structural properties of diodes fabricated in thick, selectively deposited Si/Si1-xGex epitaxial layers", IEEE ELECTRON DEVICE LETTERS, NEW YORK,US, (19920401), vol. 13, no. 4, pages 177 - 179, XP000370701 DOI: http://dx.doi.org/10.1109/55.145012 | - KAMINS T.I. ET AL, "Electrical characteristics of diodes fabricated in selective Si/Si1-xGex epitaxial layers", JOURNAL OF ELECTRONIC MATERIALS, USA, (19920801), vol. 21, no. 8, pages 817 - 824, XP009084457 | - SCOTT M.P. ET AL, "Onset of misfit dislocation generation in as-grown and annealed Si1-xGex/Si films", MATER. RES. SOC. SYMP. PROC., USA, (1989), vol. 130, pages 179 - 184, XP009084479 | by applicant | FR2080988 | JPS63141376 | EP0311816 | EP0350816 | US5338942 | WO9708754 | - KAMINS ET AL., "Electrical characteristics of diodes fabricated in selective Si/Si1-xGex epitaxial layers", JOURNAL OF ELECTRONIC MATERIALS, (19920801), vol. 21, no. 8, pages 817 - 824 | - M.P. SCOTT ET AL., "Onset of Misfit Dislocation Generation in As-grown and annealed Si1-xGex/Si films", MATER. RES. SOC. SOC. SYMP. PROC., (1989), vol. 130, pages 179 - 184 |