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Extract from the Register of European Patents

EP About this file: EP1024604

EP1024604 - Flexible viterbi decoder for wireless applications [Right-click to bookmark this link]
StatusThe application has been refused
Status updated on  10.09.2010
Database last updated on 19.07.2024
Most recent event   Tooltip10.09.2010Refusal of applicationpublished on 13.10.2010  [2010/41]
Applicant(s)For all designated states
Texas Instruments Incorporated
7839 Churchill Way
Mail Station 3999
Dallas, Texas 75251 / US
[N/P]
Former [2000/31]For all designated states
Texas Instruments Incorporated
7839 Churchill Way, Mail Station 3999
Dallas, Texas 75251 / US
Inventor(s)01 / Hocevar, Dale E.
3408 Sherrye Drive
Plano, Texas 75082 / US
02 / Gatherer, Alan
2105 Bluebonnet Drive
Richardson, Texas 75082 / US
[2000/31]
Representative(s)Potter, Julian Mark
D Young & Co LLP
120 Holborn
London
EC1N 2DY / GB
[N/P]
Former [2000/31]Potter, Julian Mark
D. Young & Co., 21 New Fetter Lane
London EC4A 1DA / GB
Application number, filing date00300658.228.01.2000
[2000/31]
Priority number, dateUS19990117763P29.01.1999         Original published format: US 117763 P
US1999047143023.12.1999         Original published format: US 471430
[2000/31]
Filing languageEN
Procedural languageEN
PublicationType: A2 Application without search report 
No.:EP1024604
Date:02.08.2000
Language:EN
[2000/31]
Type: A3 Search report 
No.:EP1024604
Date:13.12.2000
[2000/50]
Search report(s)(Supplementary) European search report - dispatched on:EP30.10.2000
ClassificationIPC:H03M13/41
[2000/31]
CPC:
H03M13/4107 (EP); H03M13/4169 (EP); H03M13/6502 (EP);
H03M13/6508 (EP); H03M13/6569 (EP)
Designated contracting statesAT,   BE,   CH,   CY,   DE,   DK,   ES,   FI,   FR,   GB,   GR,   IE,   IT,   LI,   LU,   MC,   NL,   PT,   SE [2000/31]
TitleGerman:Flexibler Viterbidekoder für drahtlose Anwendungen[2000/31]
English:Flexible viterbi decoder for wireless applications[2000/31]
French:Décodeur Viterbi flexible pour applications sans fil[2000/31]
Examination procedure25.05.2001Examination requested  [2001/30]
07.06.2002Despatch of a communication from the examining division (Time limit: M04)
09.10.2002Reply to a communication from the examining division
05.07.2004Despatch of communication that the application is deemed to be withdrawn, reason: reply to the communication from the examining division not received in time
02.01.2007Despatch of a communication from the examining division (Time limit: M06)
03.07.2007Reply to a communication from the examining division
27.02.2009Date of oral proceedings
22.04.2009Application refused, date of legal effect [2010/41]
22.04.2009Date of oral proceedings
20.05.2010Despatch of communication that the application is refused, reason: substantive examination [2010/41]
20.05.2010Minutes of oral proceedings despatched
Request for further processing for:03.09.2004Request for further processing filed
03.09.2004Full payment received (date of receipt of payment)
Request granted
01.10.2004Decision despatched
Fees paidRenewal fee
09.01.2002Renewal fee patent year 03
07.01.2003Renewal fee patent year 04
08.01.2004Renewal fee patent year 05
26.01.2005Renewal fee patent year 06
17.01.2006Renewal fee patent year 07
16.01.2007Renewal fee patent year 08
07.01.2008Renewal fee patent year 09
15.01.2009Renewal fee patent year 10
20.01.2010Renewal fee patent year 11
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Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court.
Documents cited:Search[X]  - P.J. BLACK AND T.H. MENG, "A 140-Mb/s, 32-State, Radix-4 Viterbi Decoder", IEEE JOURNAL OF SOLID-STATE CIRCUITS, New York, US, (199212), vol. 27, no. 12, pages 1877 - 1885, XP000329040 [X] 1-16 * page 1877, column 1, line 1 - page 1885, column 1, line L *

DOI:   http://dx.doi.org/10.1109/4.173118
 [A]  - BLACK P J; MENG T H -Y, "HYBRID SURVIVOR PATH ARCHITECTURES FOR VITERBI DECODERS", PROCEEDINGS OF THE INTERNATIONAL CONFERENCE ON ACOUSTICS, SPEECH, AND SIGNAL PROCESSING (ICASSP), New York, USA, (19930427), pages 433 - 436, XP000398410 [A] 1-16 * page 435, column 1, line 17 - line 37 *

DOI:   http://dx.doi.org/10.1109/ICASSP.1993.319148
 [A]  - E. CASSEAU AND E. LUTHI, "Architecture of a High-Rate VLSI Viterbi Decoder", PROCEEDINGS OF THE THIRD IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS, AND SYSTEMS. ICECS '96, Rodos, Greece, (19961013), pages 21 - 24, XP002150238 [A] 1-16 * page 21, column 1, line 1 - page 24, column 2, line L *
 [A]  - BLACK P J; MENG T H Y, "A UNIFIED APPROACH TO THE VITERBI ALGORITHM STATE METRIC UPDATE FOR SHIFT REGISTER PROCESSES", PROCEEDINGS OF THE INTERNATIONAL CONFERENCE ON ACOUSTICS, SPEECH AND SIGNAL PROCESSING (ICASSP), New York, USA, pages 629 - 632, XP000341499 [A] 1-16 * page 629, column 1, line 1 - page 632, column 2, line L *

DOI:   http://dx.doi.org/10.1109/ICASSP.1992.226677
 [DA]  - H. HENDRIX, "Viterbi Decoding Techniques in the TMS320C54x Family", TEXAS INSTRUMENTS, (199606), pages 1 - 20, XP002150239 [DA] 1-16 * page 1, line 1 - page 19, line L *
by applicant   - PETER J. BLACK; TERESA H. MENG, "A 140-Mb/s, 32-State, Radix-4 Viterbi Decoder", IEEE JOURNAL OF SOLID-STATE CIRCUITS, (199212), vol. 27, no. 12
The EPO accepts no responsibility for the accuracy of data originating from other authorities; in particular, it does not guarantee that it is complete, up to date or fit for specific purposes.