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Extract from the Register of European Patents

EP About this file: EP1049140

EP1049140 - Apparatus and method for mounting semiconductor chips on a substrate [Right-click to bookmark this link]
StatusNo opposition filed within time limit
Status updated on  16.06.2006
Database last updated on 03.09.2024
Most recent event   Tooltip12.10.2007Lapse of the patent in a contracting statepublished on 14.11.2007  [2007/46]
Applicant(s)For all designated states
Unaxis International Trading Ltd
Hinterbergstrasse 32 Postfach 5503
6330 Cham / CH
[N/P]
Former [2005/28]For all designated states
Unaxis International Trading Ltd
Hinterbergstrasse 32 Postfach 5503
6330 Cham / CH
Former [2001/09]For all designated states
ESEC Trading SA
Hinterbergstr. 32, Postfach 5503
6330 Cham / CH
Former [2000/44]For all designated states
Esec SA
Hinterbergstrasse 32, Postfach 5503
6330 Cham / CH
Inventor(s)01 / Stalder, Roland
Querstrasse 16
8050 Zürich / CH
[2000/44]
Representative(s)Falk, Urs
Patentanwaltsbüro Dr. Urs Falk
Eichholzweg 9A
6312 Steinhausen / CH
[N/P]
Former [2000/44]Falk, Urs, Dr.
Patentanwaltsbüro Dr. Urs Falk, Eichholzweg 9A
6312 Steinhausen / CH
Application number, filing date00810354.125.04.2000
[2000/44]
Priority number, dateEP1999081036730.04.1999         Original published format: EP 99810367
[2000/44]
Filing languageDE
Procedural languageDE
PublicationType: A1 Application with search report 
No.:EP1049140
Date:02.11.2000
Language:DE
[2000/44]
Type: B1 Patent specification 
No.:EP1049140
Date:10.08.2005
Language:DE
[2005/32]
Search report(s)(Supplementary) European search report - dispatched on:EP25.07.2000
ClassificationIPC:H01L21/00
[2000/44]
CPC:
H01L21/67132 (EP); H01L21/681 (EP); H01L21/6838 (EP);
H01L2221/68322 (EP)
Designated contracting statesAT,   CH,   DE,   LI [2001/29]
Former [2000/44]AT,  BE,  CH,  CY,  DE,  DK,  ES,  FI,  FR,  GB,  GR,  IE,  IT,  LI,  LU,  MC,  NL,  PT,  SE 
TitleGerman:Einrichtung und Verfahren zur Montage von Halbleiterchips auf einem Substrat[2000/44]
English:Apparatus and method for mounting semiconductor chips on a substrate[2000/44]
French:Dispositif et méthode pour le montage de puces semi-conductrices sur un substrat[2000/44]
Examination procedure02.05.2001Examination requested  [2001/27]
25.06.2004Communication of intention to grant the patent
20.07.2004Fee for grant paid
20.07.2004Fee for publishing/printing paid
Opposition(s)11.05.2006No opposition filed within time limit [2006/29]
Fees paidRenewal fee
02.05.2002Renewal fee patent year 03
02.05.2003Renewal fee patent year 04
03.05.2004Renewal fee patent year 05
02.05.2005Renewal fee patent year 06
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Lapses during opposition  TooltipAT25.04.2006
[2007/46]
Documents cited:Search[A]US4667402  (WILDE RUEDIGER [DE]) [A] 1,6 * the whole document *;
 [A]EP0565781  (MIROSLAV TRESKY DR ING [CH]) [A] 1,6 * the whole document *
The EPO accepts no responsibility for the accuracy of data originating from other authorities; in particular, it does not guarantee that it is complete, up to date or fit for specific purposes.