blank Quick help
blank Maintenance news

Scheduled maintenance

Regular maintenance outages:
between 05.00 and 05.15 hrs CET (Monday to Sunday).

Other outages
Availability

2022.02.11

More...
blank News flashes

News Flashes

New version of the European Patent Register – SPC proceedings information in the Unitary Patent Register.

2024-07-24

More...
blank Related links

Extract from the Register of European Patents

EP About this file: EP1198010

EP1198010 - Power semiconductor device comprising a lateral DMOS transistor [Right-click to bookmark this link]
StatusThe application has been withdrawn
Status updated on  01.08.2008
Database last updated on 02.11.2024
Most recent event   Tooltip01.08.2008Withdrawal of applicationpublished on 03.09.2008  [2008/36]
Applicant(s)For all designated states
STMicroelectronics Srl
Via C. Olivetti, 2
20041 Agrate Brianza (Milano) / IT
[N/P]
Former [2002/16]For all designated states
STMicroelectronics S.r.l.
Via C. Olivetti, 2
20041 Agrate Brianza (Milano) / IT
Inventor(s)01 / Patti, Davide
Corso Indipendenza, 157
95122 Catania / IT
 [2002/16]
Representative(s)Cerbaro, Elena, et al
Studio Torta S.p.A.
Via Viotti, 9
10121 Torino / IT
[N/P]
Former [2002/16]Cerbaro, Elena, Dr., et al
STUDIO TORTA S.r.l., Via Viotti, 9
10121 Torino / IT
Application number, filing date00830661.511.10.2000
[2002/16]
Filing languageIT
Procedural languageEN
PublicationType: A1 Application with search report 
No.:EP1198010
Date:17.04.2002
Language:EN
[2002/16]
Search report(s)(Supplementary) European search report - dispatched on:EP18.04.2001
ClassificationIPC:H01L29/78, H01L29/06, H01L27/088
[2002/16]
CPC:
H01L29/0852 (EP,US); H01L29/0653 (EP,US); H01L29/7816 (EP,US);
H01L29/7824 (EP,US); H01L29/0847 (EP,US)
Designated contracting statesDE,   FR,   GB,   IT [2003/02]
Former [2002/16]AT,  BE,  CH,  CY,  DE,  DK,  ES,  FI,  FR,  GB,  GR,  IE,  IT,  LI,  LU,  MC,  NL,  PT,  SE 
TitleGerman:Leistungs-Halbleiteranordnung mit einem lateralen DMOS-Transistor[2002/16]
English:Power semiconductor device comprising a lateral DMOS transistor[2002/16]
French:Dispositif semi-conducteur de puissance comprenant un transistor DMOS latéral[2002/16]
Examination procedure16.10.2002Examination requested  [2002/50]
16.06.2008Despatch of a communication from the examining division (Time limit: M04)
22.07.2008Application withdrawn by applicant  [2008/36]
Fees paidRenewal fee
28.10.2002Renewal fee patent year 03
27.10.2003Renewal fee patent year 04
26.10.2004Renewal fee patent year 05
28.10.2005Renewal fee patent year 06
27.10.2006Renewal fee patent year 07
26.10.2007Renewal fee patent year 08
Opt-out from the exclusive  Tooltip
competence of the Unified
Patent Court
See the Register of the Unified Patent Court for opt-out data
Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court.
Documents cited:Search[XY]US4796070  (BLACK ROBERT D [US]) [X] 1-3,7,8,10 * column 6, line 15 - column 9, line 15; figures 1-7 * [Y] 5,9;
 [YA]JPH11103056
 [DYA]  - ZITOUNI M ET AL, "A new concept for the lateral DMOS transistor for smart power IC's", PROCEEDINGS OF THE 11TH INTERNATIONAL SYMPOSIUM ON POWER SEMICONDUCTOR DEVICES AND ICS (ISPSD'99), TORONTO, ONTARIO, CANADA, IEEE, PISCATAWAY, NJ, USA, (19990526), ISBN 0-7803-5290-4, pages 73 - 76, XP000903548 [DY] 5 * figures 3A,11 * [A] 1,8,10
 [YA]  - PATENT ABSTRACTS OF JAPAN, (19990730), vol. 1999, no. 09, & JP11103056 A 19990413 (TOYOTA CENTRAL RES & DEV LAB INC) [Y] 9 * abstract * [A] 1,8,10
The EPO accepts no responsibility for the accuracy of data originating from other authorities; in particular, it does not guarantee that it is complete, up to date or fit for specific purposes.