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Extract from the Register of European Patents

EP About this file: EP1154486

EP1154486 - ESD protection device comprising parallel bipolar transistors [Right-click to bookmark this link]
StatusNo opposition filed within time limit
Status updated on  30.12.2016
Database last updated on 25.09.2024
Most recent event   Tooltip30.12.2016No opposition filed within time limitpublished on 01.02.2017  [2017/05]
Applicant(s)For all designated states
Micronas GmbH
Hans-Bunte-Strasse 19
79108 Freiburg i. Br. / DE
[2016/08]
Former [2001/46]For all designated states
Micronas GmbH
Hans-Bunte-Strasse 19
79108 Freiburg / DE
Inventor(s)01 / Czech, Martin, Dipl.-Ing.
Kappler Strasse 50f
79117 Freiburg / DE
02 / Graf, Peter, Dipl.-Ing.
Antoniterstrasse 5
79331 Teuingen-Nimburg / DE
 [2001/46]
Representative(s)Koch Müller Patentanwaltsgesellschaft mbH
Maaßstraße 32/1
69123 Heidelberg / DE
[N/P]
Former [2016/08]Koch Müller Patentanwaltsgesellschaft mbH
Maaßstraße 32/1
69123 Heidelberg / DE
Former [2010/32]Koch Müller Patentanwaltsgesellschaft mbH
Maaßstraße 32/1
69123 Heidelberg / DE
Former [2001/46]Patentanwälte Westphal, Mussgnug & Partner
Waldstrasse 33
78048 Villingen-Schwenningen / DE
Application number, filing date01111009.508.05.2001
[2001/46]
Priority number, dateDE2000102236608.05.2000         Original published format: DE 10022366
[2001/46]
Filing languageDE
Procedural languageDE
PublicationType: A1 Application with search report 
No.:EP1154486
Date:14.11.2001
Language:DE
[2001/46]
Type: B1 Patent specification 
No.:EP1154486
Date:24.02.2016
Language:DE
[2016/08]
Search report(s)(Supplementary) European search report - dispatched on:EP09.08.2001
ClassificationIPC:H01L27/02
[2001/46]
CPC:
H01L27/0259 (EP,US); H01L27/0266 (EP,US)
Designated contracting statesDE,   FR,   GB,   IT,   NL [2016/08]
Former [2002/31]DE,  FR,  GB,  IT,  NL 
Former [2001/46]AT,  BE,  CH,  CY,  DE,  DK,  ES,  FI,  FR,  GB,  GR,  IE,  IT,  LI,  LU,  MC,  NL,  PT,  SE,  TR 
TitleGerman:ESD-Schutzstruktur mit parallelen Bipolartransitoren[2015/14]
English:ESD protection device comprising parallel bipolar transistors[2001/46]
French:Dispositif de protection contre les décharges électrostatiques comprenant des transistors bipolaires paralleles[2001/46]
Former [2001/46]ESD-Schutzstruktur mit parallelen Bipolartransistoren
Examination procedure07.05.2002Examination requested  [2002/28]
15.05.2002Loss of particular rights, legal effect: designated state(s)
02.09.2002Despatch of communication of loss of particular rights: designated state(s) AT, BE, CH, CY, DK, ES, FI, GR, IE, LU, MC, PT, SE, TR
08.07.2005Despatch of a communication from the examining division (Time limit: M07)
20.02.2006Reply to a communication from the examining division
05.09.2007Despatch of a communication from the examining division (Time limit: M06)
17.03.2008Reply to a communication from the examining division
26.05.2014Despatch of a communication from the examining division (Time limit: M05)
06.10.2014Reply to a communication from the examining division
28.09.2015Communication of intention to grant the patent
11.12.2015Fee for grant paid
11.12.2015Fee for publishing/printing paid
11.12.2015Receipt of the translation of the claim(s)
Divisional application(s)The date of the Examining Division's first communication in respect of the earliest application for which a communication has been issued is  08.07.2005
Opposition(s)25.11.2016No opposition filed within time limit [2017/05]
Fees paidRenewal fee
19.05.2003Renewal fee patent year 03
27.05.2004Renewal fee patent year 04
19.05.2005Renewal fee patent year 05
30.05.2006Renewal fee patent year 06
30.05.2007Renewal fee patent year 07
28.05.2008Renewal fee patent year 08
25.05.2009Renewal fee patent year 09
28.05.2010Renewal fee patent year 10
24.05.2011Renewal fee patent year 11
23.03.2012Renewal fee patent year 12
27.05.2013Renewal fee patent year 13
27.03.2014Renewal fee patent year 14
21.05.2015Renewal fee patent year 15
Penalty fee
Penalty fee Rule 85a EPC 1973
18.06.2002AT   M01   Not yet paid
18.06.2002BE   M01   Not yet paid
18.06.2002CH   M01   Not yet paid
18.06.2002CY   M01   Not yet paid
18.06.2002DK   M01   Not yet paid
18.06.2002ES   M01   Not yet paid
18.06.2002FI   M01   Not yet paid
18.06.2002GR   M01   Not yet paid
18.06.2002IE   M01   Not yet paid
18.06.2002LU   M01   Not yet paid
18.06.2002MC   M01   Not yet paid
18.06.2002PT   M01   Not yet paid
18.06.2002SE   M01   Not yet paid
18.06.2002TR   M01   Not yet paid
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Lapses during opposition  TooltipIT24.02.2016
NL24.02.2016
[2016/36]
Documents cited:Search[A]EP0575062  (AMERICAN TELEPHONE & TELEGRAPH [US]) [A] 1 * figure 3 *;
 [XA]EP0851494  (NEC CORP [JP]) [X] 1,9-12 * column 1, line 22 - column 2, line 32; figures 2A,2B,3 *[A] 2-8;
 [A]US5898206  (YAMAMOTO YUHIDE [JP]) [A] 1 * column 1, line 37 - column 2, line 32; figures 17A,17B * * column 3, line 39 - line 48; figures 18,19 *;
 [X]EP0948051  (NIPPON ELECTRIC CO [JP]) [X] 1-11 * paragraph [0023]; figures 6A,6B * * paragraph [0026]; figures 8A,8B * * figure 12A *
The EPO accepts no responsibility for the accuracy of data originating from other authorities; in particular, it does not guarantee that it is complete, up to date or fit for specific purposes.