EP1356718 - PACKAGED INTEGRATED CIRCUITS AND METHODS OF PRODUCING THEREOF [Right-click to bookmark this link] | Status | The application is deemed to be withdrawn Status updated on 20.02.2015 Database last updated on 14.09.2024 | Most recent event Tooltip | 20.02.2015 | Application deemed to be withdrawn | published on 25.03.2015 [2015/13] | Applicant(s) | For all designated states Invensas Corporation 2702 Orchard Parkway San Jose, CA 95134 / US | [2013/25] |
Former [2011/41] | For all designated states DigitalOptics Corporation Europe Limited Cliona, Building One Parkmore East Business Park Ballybrit Galway / IE | ||
Former [2011/09] | For all designated states Tessera Technologies Ireland Limited Cliona, Building One Parkmore East Business Park Ballybrit Galway / IE | ||
Former [2006/24] | For all designated states Tessera Technologies Hungary Kft. 1126 Budapest Ugocsa u. 4/B / HU | ||
Former [2003/44] | For all designated states SHELLCASE LTD. P.O. Box 48328, Manhat Technology Park 96251 Jerusalem / IL | Inventor(s) | 01 /
BADEHI, Avner 6 Nataf Street 90804 Mobile Post Harei Yehuda / IL | [2007/31] |
Former [2003/44] | 01 /
BADIHI, Avner 6 Nataf Street 90804 Mobile Post Harei Yehuda / IL | Representative(s) | South, Nicholas Geoffrey AA Thornton IP LLP 8th Floor, 125 Old Broad Street London EC2N 1AR / GB | [N/P] |
Former [2013/16] | South, Nicholas Geoffrey A.A. Thornton & Co. 235 High Holborn London WC1V 7LE / GB | ||
Former [2013/12] | (deleted) | ||
Former [2006/28] | Dawson, Elizabeth Ann A.A. Thornton & Co. 235 High Holborn London WC1V 7LE / GB | ||
Former [2003/44] | Butcher, Ian James, et al A.A. Thornton & Co. 235 High Holborn London WC1V 7LE / GB | Application number, filing date | 01271792.2 | 19.12.2001 | [2003/44] | WO2001IL01183 | Priority number, date | IL20000140482 | 21.12.2000 Original published format: IL 14048200 | US20010758906 | 11.01.2001 Original published format: US 758906 | [2003/44] | Filing language | EN | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | WO0251217 | Date: | 27.06.2002 | Language: | EN | [2002/26] | Type: | A2 Application without search report | No.: | EP1356718 | Date: | 29.10.2003 | Language: | EN | The application published by WIPO in one of the EPO official languages on 27.06.2002 takes the place of the publication of the European patent application. | [2003/44] | Search report(s) | International search report - published on: | US | 24.07.2003 | (Supplementary) European search report - dispatched on: | EP | 03.11.2009 | Classification | IPC: | H01L23/31, H01L23/485, H01L25/10 | [2004/08] | CPC: |
H01L23/3114 (EP,US);
H01L23/485 (KR);
H01L24/02 (US);
H01L23/49805 (EP,US);
H01L24/24 (EP);
H01L24/82 (EP);
H01L24/96 (EP,US);
H01L24/97 (EP,US);
H01L25/105 (EP,US);
H01L2221/6834 (EP,US);
H01L2224/24145 (EP);
H01L2225/1023 (EP,US);
H01L2225/1058 (EP,US);
H01L27/14643 (EP,US);
H01L2924/01005 (EP,US);
H01L2924/01013 (EP,US);
H01L2924/01014 (EP,US);
H01L2924/01015 (EP,US);
H01L2924/01019 (EP,US);
H01L2924/0102 (EP,US);
H01L2924/01023 (EP,US);
H01L2924/01027 (EP,US);
H01L2924/01029 (EP,US);
H01L2924/01032 (EP,US);
H01L2924/01033 (EP,US);
H01L2924/01039 (EP,US);
H01L2924/01058 (EP,US);
|
Former IPC [2003/50] | H01L23/02, H01L23/544, H01L21/50 | ||
Former IPC [2003/44] | H05K1/00 | Designated contracting states | AT, BE, CH, CY, DE, DK, ES, FI, FR, GB, GR, IE, IT, LI, LU, MC, NL, PT, SE, TR [2003/44] | Extension states | AL | Not yet paid | LT | Not yet paid | LV | Not yet paid | MK | Not yet paid | RO | Not yet paid | SI | Not yet paid | Title | German: | VERPACKTE INTEGRIERTE SCHALTUNGEN UND VERFAHREN ZU IHRER HERSTELLUNG | [2003/44] | English: | PACKAGED INTEGRATED CIRCUITS AND METHODS OF PRODUCING THEREOF | [2003/44] | French: | CIRCUITS INTEGRES SOUS BOITIER ET PROCEDES DE PRODUCTION DE CEUX-CI | [2003/44] | Entry into regional phase | 18.07.2003 | National basic fee paid | 18.07.2003 | Search fee paid | 18.07.2003 | Designation fee(s) paid | 18.07.2003 | Examination fee paid | Examination procedure | 17.07.2002 | Request for preliminary examination filed International Preliminary Examining Authority: US | 18.07.2003 | Examination requested [2003/44] | 15.10.2003 | Amendment by applicant (claims and/or description) | 26.01.2011 | Despatch of a communication from the examining division (Time limit: M06) | 26.07.2011 | Reply to a communication from the examining division | 11.06.2012 | Despatch of a communication from the examining division (Time limit: M06) | 11.12.2012 | Reply to a communication from the examining division | 08.02.2013 | Despatch of a communication from the examining division (Time limit: M06) | 14.08.2013 | Reply to a communication from the examining division | 07.04.2014 | Despatch of a communication from the examining division (Time limit: M06) | 18.10.2014 | Application deemed to be withdrawn, date of legal effect [2015/13] | 13.11.2014 | Despatch of communication that the application is deemed to be withdrawn, reason: reply to the communication from the examining division not received in time [2015/13] | Divisional application(s) | The date of the Examining Division's first communication in respect of the earliest application for which a communication has been issued is 26.01.2011 | Fees paid | Renewal fee | 29.12.2003 | Renewal fee patent year 03 | 12.05.2005 | Renewal fee patent year 04 | 22.12.2005 | Renewal fee patent year 05 | 13.12.2006 | Renewal fee patent year 06 | 05.12.2007 | Renewal fee patent year 07 | 08.12.2008 | Renewal fee patent year 08 | 07.12.2009 | Renewal fee patent year 09 | 22.11.2010 | Renewal fee patent year 10 | 06.12.2011 | Renewal fee patent year 11 | 07.12.2012 | Renewal fee patent year 12 | 12.12.2013 | Renewal fee patent year 13 | Penalty fee | Additional fee for renewal fee | 31.12.2004 | 04   M06   Fee paid on   12.05.2005 | 31.12.2014 | 14   M06   Not yet paid |
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Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [A]WO9519645 (SHELLCASE LTD [IL], et al) [A] 1-33 * the whole document *; | [A]US5910687 (CHEN CHANGSHENG [US], et al) [A] 1-33* column 6, line 47 - column 13, line 10; figures 3-14 *; | [X]US5965933 (YOUNG WILLIAM R [US], et al) [X] 1-33 * the whole document *; | [A]JP2000243903 (ROHM CO LTD) [A] 7,8,20,21,27,28 * the whole document * | International search | [X]US5567657 (WOJNAROWSKI ROBERT J [US], et al); | [X]US5814894 (IGARASHI KAZUMASA [JP], et al); | [X]US5952712 (IKUINA KAZUHIRO [JP], et al); | [Y]US5965933 (YOUNG WILLIAM R [US], et al) | by applicant | US5965933 | JP2000243903 | - "Four Semiconductor Manufacturers Agree to Unified Specifications for Stacked Chip Scale Packages", Mitsubishi Semiconductors, MITSUBISHI ELECTRONICS AMERICA, INC. | - "First Three-Chip Staked CSP Developed", SEMICONDUCTOR INTERNATIONAL, (200001), page 22 | - "High-Density Packaging: The Next Interconnect Challenge", SEMICONDUCTOR INTERNATIONAL, (200002), pages 91 - 100 | - A FAN, A. RAHMAN, R. RIEF, "Copper Wafer Bonding", ELECTROCHEMICAL AND SOLID STATE LETTERS, (1999), vol. 2, no. 10, pages 534 - 536 | - J. BALIGA, "Front-End 3-D Packaging", SEMICONDUCTOR INTERNATIONAL, (199912), page 52 |