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EP1150222
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EP About this file: EP1150222
| EP1150222 - Integrated circuit design [Right-click to bookmark this link] | Status | The application has been refused Status updated on 07.08.2009 Database last updated on 18.11.2024 | Most recent event Tooltip | 07.08.2009 | Refusal of application | published on 09.09.2009 [2009/37] | Applicant(s) | For all designated states Hewlett-Packard Company 3000 Hanover Street Palo Alto, CA 94304-1112 / US | [N/P] |
| Former [2008/38] | For all designated states Hewlett-Packard Company 3000 Hanover Street Palo Alto CA 94304-1112 / US | ||
| Former [2001/44] | For all designated states Hewlett-Packard Company 3000 Hanover Street, M/S 20BN Palo Alto, CA 94304 / US | Inventor(s) | 01 /
Gluss, Robert J. 1671 Bearden Drive Los Gatos, California 95032 / US | 02 /
Fiduccia, Nicholas A. 18692 Martha Avenue Saratoga, California 95070 / US | [2001/44] | Representative(s) | Jehan, Robert, et al Williams Powell 44 Prospect Place Bromley, Kent BR2 9HN / GB | [N/P] |
| Former [2001/44] | Jehan, Robert, et al Williams, Powell & Associates, 4 St Paul's Churchyard London EC4M 8AY / GB | Application number, filing date | 01302695.0 | 23.03.2001 | [2001/44] | Priority number, date | US20000562591 | 29.04.2000 Original published format: US 562591 | [2001/44] | Filing language | EN | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | EP1150222 | Date: | 31.10.2001 | Language: | EN | [2001/44] | Type: | A3 Search report | No.: | EP1150222 | Date: | 02.04.2003 | [2003/14] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 13.02.2003 | Classification | IPC: | G06F17/50 | [2001/44] | CPC: |
G06F30/30 (EP,US);
G06F30/39 (EP,US)
| Designated contracting states | DE, FR, GB [2004/01] |
| Former [2001/44] | AT, BE, CH, CY, DE, DK, ES, FI, FR, GB, GR, IE, IT, LI, LU, MC, NL, PT, SE, TR | Title | German: | Entwurf von integrierten Schaltungen | [2001/44] | English: | Integrated circuit design | [2001/44] | French: | Conception de circuits intégrés | [2001/44] | Examination procedure | 04.08.2003 | Examination requested [2003/40] | 28.12.2006 | Despatch of a communication from the examining division (Time limit: M04) | 02.04.2007 | Reply to a communication from the examining division | 24.04.2009 | Despatch of communication that the application is refused, reason: substantive examination [2009/37] | 04.05.2009 | Application refused, date of legal effect [2009/37] | 23.06.2009 | Date of oral proceedings | Fees paid | Renewal fee | 24.03.2003 | Renewal fee patent year 03 | 22.03.2004 | Renewal fee patent year 04 | 22.03.2005 | Renewal fee patent year 05 | 29.03.2006 | Renewal fee patent year 06 | 28.03.2007 | Renewal fee patent year 07 | 27.03.2008 | Renewal fee patent year 08 | Penalty fee | Additional fee for renewal fee | 31.03.2009 | 09 M06 Not yet paid |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [A]US5838580 (SRIVATSA CHAKRA R [US]) [A] 1-10* column 2, line 32 - line 63 *; | [A]US5995735 (LE KHANH M [US]) [A] 1-10 * column 2, line 43 - column 3, line 35 * * figures 1-3 *; | [XA] - MCINERNEY R ET AL, "METHODOLOGY FOR REPEATER INSERTION MANAGEMENT IN THE RTL, LAYOUT, FLOORPLAN AND FULLCHIP TIMING DATABASES OF THE ITANIUM MICROPROCESSOR", PROCEEDINGS INTERNATIONAL SYMPOSIUM ON PHYSICAL DESIGN, 2000. ISPD-2000. SAN DIEGO, CA, APRIL 9 - 12, 2000, PROCEEDINGS OF THE INTERNATIONAL SYMPOSIUM ON PHYSICAL DESIGN, NEW YORK, NY: ACM, US, (20000409), ISBN 1-58113-191-7, pages 99 - 104, XP000922020 [X] 1-4,8-10 * the whole document * [A] 5-7 DOI: http://dx.doi.org/10.1145/332357.332383 | [XA] - CONG J ET AL, "Buffer block planning for interconnect-driven floorplanning", COMPUTER-AIDED DESIGN, 1999. DIGEST OF TECHNICAL PAPERS. 1999 IEEE/ACM INTERNATIONAL CONFERENCE ON SAN JOSE, CA, USA 7-11 NOV. 1999, PISCATAWAY, NJ, USA,IEEE, US, (19991107), ISBN 0-7803-5832-5, pages 358 - 363, XP010363902 [X] 1,8,9 * paragraph [0002] * [A] 2-7,10 DOI: http://dx.doi.org/10.1109/ICCAD.1999.810675 |