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Extract from the Register of European Patents

EP About this file: EP1340254

EP1340254 - DRAM WITH VERTICAL TRANSISTOR AND TRENCH CAPACITOR MEMORY CELLS AND METHOD OF FABRICATION [Right-click to bookmark this link]
StatusThe application has been withdrawn
Status updated on  10.06.2005
Database last updated on 20.07.2024
Most recent event   Tooltip10.06.2005Withdrawal of applicationpublished on 27.07.2005  [2005/30]
Applicant(s)For all designated states
Infineon Technologies North America Corp.
1730 North First Street
San Jose, CA 95112-4508 / US
[2003/36]
Inventor(s)01 / PRAIKASH, Jai, V., C.
1000 Escalon Avenue E204
Sunnyvale, CA 94085 / US
02 / SEITZ, Mihel
Patty-Frank-Weg 18
01445 Redebeul / DE
03 / ARNOLD, Norbert
25 Keith Drive
Chestnut Ridge, NY 12560 / US
 [2003/50]
Former [2003/36]01 / JAIPRAKASH, V., C.
39 c. Hudson View Drive
Beacon, NY 12508 / US
02 / SEITZ, Michel
32 Nicole Drive
Wappingers Falls, NY 12560 / US
03 / ARNOLD, Norbert
25 Keith Drive
Chestnut Ridge, NY 12560 / US
Representative(s)Epping - Hermann - Fischer
Patentanwaltsgesellschaft mbH
Schlossschmidstrasse 5
80639 München / DE
[N/P]
Former [2003/36]Epping Hermann & Fischer
Ridlerstrasse 55
80339 München / DE
Application number, filing date01991947.114.11.2001
[2003/36]
WO2001US43959
Priority number, dateUS2000073134306.12.2000         Original published format: US 731343
[2003/36]
Filing languageEN
Procedural languageEN
PublicationType: A2 Application without search report
No.:WO0247159
Date:13.06.2002
Language:EN
[2002/24]
Type: A2 Application without search report 
No.:EP1340254
Date:03.09.2003
Language:EN
The application published by WIPO in one of the EPO official languages on 13.06.2002 takes the place of the publication of the European patent application.
[2003/36]
Search report(s)International search report - published on:EP22.05.2003
ClassificationIPC:H01L21/8242
[2003/36]
CPC:
H10B12/0385 (EP,US)
Designated contracting statesDE,   FR,   GB,   IE,   IT [2004/21]
Former [2003/36]AT,  BE,  CH,  CY,  DE,  DK,  ES,  FI,  FR,  GB,  GR,  IE,  IT,  LI,  LU,  MC,  NL,  PT,  SE,  TR 
TitleGerman:DRAM MIT VERTIKALTRANSISTOR- UND GRABENKONDENSATORSPEICHERZELLEN UND VERFAHREN ZUR HERSTELLUNG DESSELBEN[2003/36]
English:DRAM WITH VERTICAL TRANSISTOR AND TRENCH CAPACITOR MEMORY CELLS AND METHOD OF FABRICATION[2003/36]
French:RAM DYNAMIQUE AVEC UN TRANSISTOR VERTICAL ET CELLULES DE CONDENSATEUR MEMOIRE DE TRANCHEES, ET PROCEDE DE FABRICATION CORRESPONDANT[2003/36]
Entry into regional phase27.05.2003National basic fee paid 
27.05.2003Designation fee(s) paid 
27.05.2003Examination fee paid 
Examination procedure27.06.2002Request for preliminary examination filed
International Preliminary Examining Authority: EP
27.05.2003Amendment by applicant (claims and/or description)
27.05.2003Examination requested  [2003/36]
07.06.2005Application withdrawn by applicant  [2005/30]
Fees paidRenewal fee
21.11.2003Renewal fee patent year 03
22.11.2004Renewal fee patent year 04
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Cited inInternational search[X]JPH05291528  ;
 [X]US5519236  (OZAKI TOHRU [JP]) [X] 1-6 * column W *;
 [PX]US6284593  (MANDELMAN JACK A [US], et al) [PX] 1-10 * column A; figures 13A-13C *;
 [E]DE10038728  (INFINEON TECHNOLOGIES AG [DE]) [E] 1-10 * abstract *
 [X]  - PATENT ABSTRACTS OF JAPAN, (19940209), vol. 018, no. 080, Database accession no. (E - 1505), & JP05291528 A 19931105 (TOSHIBA CORP) [X] 1-6 * abstract *
The EPO accepts no responsibility for the accuracy of data originating from other authorities; in particular, it does not guarantee that it is complete, up to date or fit for specific purposes.