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Extract from the Register of European Patents

EP About this file: EP1433243

EP1433243 - HIGH VOLTAGE GENERATOR INCORPORATED IN AN INTEGRATED CIRCUIT [Right-click to bookmark this link]
StatusNo opposition filed within time limit
Status updated on  07.04.2006
Database last updated on 24.08.2024
Most recent event   Tooltip07.04.2006No opposition filed within time limitpublished on 24.05.2006  [2006/21]
Applicant(s)For all designated states
EM Microelectronic-Marin SA
Rue des Sors 3
2074 Marin / CH
[2004/27]
Inventor(s)01 / PEROTTO, Jean-Félix
Rue Notre-Dame 23B
CH-2013 Colombier / CH
 [2004/27]
Representative(s)Vigand, Philippe, et al
ICB
Ingénieurs Conseils en Brevets S.A.
Faubourg de l'Hôpital 3
2001 Neuchâtel / CH
[N/P]
Former [2004/27]Vigand, Philippe (FR), et al
ICB, Ingénieurs Conseils en Brevets SA, Rue des Sors 7
CH-2074 Marin / CH
Application number, filing date02774682.527.09.2002
[2004/27]
WO2002EP11072
Priority number, dateFR2001001243627.09.2001         Original published format: FR 0112436
[2004/27]
Filing languageFR
Procedural languageFR
PublicationType: A2 Application without search report
No.:WO03030343
Date:10.04.2003
Language:FR
[2003/15]
Type: A2 Application without search report 
No.:EP1433243
Date:30.06.2004
Language:FR
The application published by WIPO in one of the EPO official languages on 10.04.2003 takes the place of the publication of the European patent application.
[2004/27]
Type: B1 Patent specification 
No.:EP1433243
Date:01.06.2005
Language:FR
[2005/22]
Search report(s)International search report - published on:EP20.11.2003
ClassificationIPC:H02M3/07
[2004/27]
CPC:
H02M3/073 (EP,US)
Designated contracting statesCH,   DE,   GB,   IT,   LI [2005/22]
Former [2004/27]AT,  BE,  BG,  CH,  CY,  CZ,  DE,  DK,  EE,  ES,  FI,  FR,  GB,  GR,  IE,  IT,  LI,  LU,  MC,  NL,  PT,  SE,  SK,  TR 
TitleGerman:IN EINE INTEGRIERTE SCHALTUNG EINGEBAUTER HOCHSPANNUNGSGENERATOR[2004/27]
English:HIGH VOLTAGE GENERATOR INCORPORATED IN AN INTEGRATED CIRCUIT[2004/27]
French:GENERATEUR DE HAUTE TENSION INCORPORE DANS UN CIRCUIT INTEGRE[2004/27]
Entry into regional phase27.04.2004National basic fee paid 
21.05.2004Designation fee(s) paid 
21.05.2004Examination fee paid 
Examination procedure10.04.2003Request for preliminary examination filed
International Preliminary Examining Authority: EP
21.05.2004Examination requested  [2004/30]
08.09.2004Communication of intention to grant the patent
18.03.2005Fee for grant paid
18.03.2005Fee for publishing/printing paid
Opposition(s)02.03.2006No opposition filed within time limit [2006/21]
Fees paidRenewal fee
30.09.2004Renewal fee patent year 03
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Cited inInternational search[A]EP0485016  (PHILIPS NV [NL]) [A] 1 * the whole document *;
 [A]US5600551  (LUSCHER JR JAMES J [US]) [A] 1 * the whole document *;
 [A]EP0292269  (MATSUSHITA ELECTRIC IND CO LTD [JP]) [A] 1 * the whole document *;
 [A]US5394320  (BLODGETT GREG A [US]) [A] 1 * the whole document *
 [A]  - RUSZNYAK A, "ONE-PIN OSCILLATORS AND VOLTAGE MULTIPLIERS", IEEE CIRCUITS AND DEVICES MAGAZINE, IEEE INC. NEW YORK, US, (199809), vol. 14, no. 5, ISSN 8755-3996, pages 52 - 54, XP000831655 [A] 1 * the whole document *

DOI:   http://dx.doi.org/10.1109/101.721520
The EPO accepts no responsibility for the accuracy of data originating from other authorities; in particular, it does not guarantee that it is complete, up to date or fit for specific purposes.