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Extract from the Register of European Patents

EP About this file: EP1446910

EP1446910 - PHASE ADJUSTMENT APPARATUS AND METHOD FOR A MEMORY DEVICE SIGNALING SYSTEM [Right-click to bookmark this link]
StatusNo opposition filed within time limit
Status updated on  17.06.2011
Database last updated on 28.03.2026
Most recent event   Tooltip19.10.2012Lapse of the patent in a contracting state
New state(s): TR		published on 21.11.2012  [2012/47]
Applicant(s)For all designated states
Rambus Inc.
1050 Enterprise Way, Suite 700
Sunnyvale, CA 94089 / US
[2010/50]
Former [2010/32]For all designated states
RAMBUS INC.
4440 El Camino Real Los Altos
California 94022 / US
Former [2004/34]For all designated states
Rambus Inc.
4440 El Camino Real
Los Altos, California 94022 / US
Inventor(s)01 / HAMPEL, Craig, E.
5927 Dunn Avenue
San Jose, CA 95123 / US
02 / PEREGO, Richard, E.
5938 Pala Mesa Drive
San Jose, CA 95123 / US
03 / SIDIROPOULOS, Stephanos, S.
731 Ellsworth Street
Palo Alto, CA 94306 / US
04 / TSERN, Ely, K.
Dixon Way, 784
Los Altos, CA 94022 / US
05 / WARE, Fredrick, A.
13961 Fremont, Pines
Los Altos Hills, CA 94022 / US
 [2004/48]
Former [2004/34]01 / HAMPEL, Craig, E.
5927 Dunn Avenue
San Jose, CA 95123 / US
02 / PEREGO, Richard, E.
5938 Pala Mesa Drive
San Jose, CA 95123 / US
03 / SIDIROPOULOS, Stephanos, S.
731 Ellsworth Street
Palo Alto, CA 94306 / US
04 / TSERN, Ely, K.
684 Riviera Drive
Los Altos, CA 94024 / US
05 / WARE, Fredrick, A.
13961 Fremont, Pines
Los Altos Hills, CA 94022 / US
Representative(s)Eisenführ Speiser
Patentanwälte Rechtsanwälte PartGmbB
Johannes-Brahms-Platz 1
20355 Hamburg / DE
[N/P]
Former [2009/28]Eisenführ, Speiser & Partner
Johannes-Brahms-Platz 1
20355 Hamburg / DE
Former [2004/34]Eisenführ, Speiser & Partner
Patentanwälte Rechtsanwälte Postfach 10 60 78
28060 Bremen / DE
Application number, filing date02802180.622.10.2002
[2004/34]
WO2002US33706
Priority number, dateUS20010343905P22.10.2001         Original published format: US 343905 P
US20020376947P30.04.2002         Original published format: US 376947 P
[2004/34]
Filing languageEN
Procedural languageEN
PublicationType: A1 Application with search report
No.:WO03036850
Date:01.05.2003
Language:EN
[2003/18]
Type: A1 Application with search report 
No.:EP1446910
Date:18.08.2004
Language:EN
The application published by WIPO in one of the EPO official languages on 01.05.2003 takes the place of the publication of the European patent application.
[2004/34]
Type: B1 Patent specification 
No.:EP1446910
Date:11.08.2010
Language:EN
[2010/32]
Search report(s)International search report - published on:US01.05.2003
(Supplementary) European search report - dispatched on:EP14.07.2006
ClassificationIPC:H04L5/16, G06F1/04, G11C7/10
[2006/33]
CPC:
G11C7/10 (EP,US); G11C11/4076 (US); G06F12/0246 (US);
G06F3/061 (US); G06F3/0629 (US); G06F3/0671 (US);
G11C11/40611 (US); G11C11/4072 (US); G11C11/4078 (EP,US);
G11C11/4093 (US); G11C21/00 (US); G11C7/1051 (EP,US);
G11C7/106 (EP,US); G11C7/1066 (EP,US); G11C7/1078 (EP,US);
G11C7/1087 (EP,US); G11C7/22 (EP,US); G11C7/222 (EP,US);
H04L7/0091 (EP,US); G11C2207/2254 (EP,US); H04L67/10 (US);
H04L7/0025 (EP,US); H04L7/0079 (EP,US); H10B43/27 (US) (-)
Former IPC [2004/34]H04L5/16, G06F1/04
Designated contracting statesAT,   BE,   BG,   CH,   CY,   CZ,   DE,   DK,   EE,   ES,   FI,   FR,   GB,   GR,   IE,   IT,   LI,   LU,   MC,   NL,   PT,   SE,   SK,   TR [2004/34]
Extension statesALNot yet paid
LTNot yet paid
LVNot yet paid
MKNot yet paid
RONot yet paid
SINot yet paid
TitleGerman:PHASENEINSTELLVORRICHTUNG UND VERFAHREN FÜR EIN SPEICHERBAUSTEIN-SIGNALISIERUNGSSYSTEM[2004/34]
English:PHASE ADJUSTMENT APPARATUS AND METHOD FOR A MEMORY DEVICE SIGNALING SYSTEM[2004/34]
French:APPAREIL ET PROCEDE DE REGLAGE DE PHASE POUR SYSTEME DE SIGNALEMENT A DISPOSITIF DE MEMOIRE[2004/34]
Entry into regional phase24.05.2004National basic fee paid 
24.05.2004Search fee paid 
24.05.2004Designation fee(s) paid 
24.05.2004Examination fee paid 
Examination procedure21.05.2003Request for preliminary examination filed
International Preliminary Examining Authority: US
14.05.2004Amendment by applicant (claims and/or description)
24.05.2004Examination requested  [2004/34]
31.01.2007Despatch of a communication from the examining division (Time limit: M06)
25.06.2007Reply to a communication from the examining division
02.05.2008Despatch of a communication from the examining division (Time limit: M06)
05.09.2008Reply to a communication from the examining division
09.11.2009Despatch of a communication from the examining division (Time limit: M04)
11.12.2009Reply to a communication from the examining division
22.02.2010Communication of intention to grant the patent
02.07.2010Fee for grant paid
02.07.2010Fee for publishing/printing paid
Divisional application(s)EP07117256.3  / EP1865648
Opposition(s)12.05.2011No opposition filed within time limit [2011/29]
Fees paidRenewal fee
25.10.2004Renewal fee patent year 03
27.10.2005Renewal fee patent year 04
27.10.2006Renewal fee patent year 05
31.10.2007Renewal fee patent year 06
14.03.2008Renewal fee patent year 07
26.10.2009Renewal fee patent year 08
Opt-out from the exclusive  Tooltip
competence of the Unified
Patent Court		 See the Register of the Unified Patent Court for opt-out data
Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court.
Lapses during opposition  TooltipAT11.08.2010
BE11.08.2010
CY11.08.2010
CZ11.08.2010
DK11.08.2010
EE11.08.2010
FI11.08.2010
IT11.08.2010
NL11.08.2010
SE11.08.2010
SK11.08.2010
TR11.08.2010
IE22.10.2010
LU22.10.2010
CH31.10.2010
LI31.10.2010
MC31.10.2010
FR02.11.2010
BG11.11.2010
GR12.11.2010
ES22.11.2010
PT13.12.2010
[2012/47]
Former [2012/44]AT11.08.2010
BE11.08.2010
CY11.08.2010
CZ11.08.2010
DK11.08.2010
EE11.08.2010
FI11.08.2010
IT11.08.2010
NL11.08.2010
SE11.08.2010
SK11.08.2010
IE22.10.2010
LU22.10.2010
CH31.10.2010
LI31.10.2010
MC31.10.2010
FR02.11.2010
BG11.11.2010
GR12.11.2010
ES22.11.2010
PT13.12.2010
Former [2011/47]AT11.08.2010
BE11.08.2010
CY11.08.2010
CZ11.08.2010
DK11.08.2010
EE11.08.2010
FI11.08.2010
IT11.08.2010
NL11.08.2010
SE11.08.2010
SK11.08.2010
IE22.10.2010
CH31.10.2010
LI31.10.2010
MC31.10.2010
FR02.11.2010
BG11.11.2010
GR12.11.2010
ES22.11.2010
PT13.12.2010
Former [2011/35]AT11.08.2010
BE11.08.2010
CY11.08.2010
CZ11.08.2010
DK11.08.2010
EE11.08.2010
FI11.08.2010
IT11.08.2010
NL11.08.2010
SE11.08.2010
SK11.08.2010
CH31.10.2010
LI31.10.2010
MC31.10.2010
FR02.11.2010
BG11.11.2010
GR12.11.2010
ES22.11.2010
PT13.12.2010
Former [2011/31]AT11.08.2010
BE11.08.2010
CY11.08.2010
CZ11.08.2010
DK11.08.2010
EE11.08.2010
FI11.08.2010
IT11.08.2010
NL11.08.2010
SE11.08.2010
SK11.08.2010
MC31.10.2010
BG11.11.2010
GR12.11.2010
ES22.11.2010
PT13.12.2010
Former [2011/24]AT11.08.2010
BE11.08.2010
CY11.08.2010
CZ11.08.2010
DK11.08.2010
EE11.08.2010
FI11.08.2010
NL11.08.2010
SE11.08.2010
SK11.08.2010
MC31.10.2010
BG11.11.2010
GR12.11.2010
PT13.12.2010
Former [2011/23]AT11.08.2010
BE11.08.2010
CY11.08.2010
CZ11.08.2010
DK11.08.2010
EE11.08.2010
FI11.08.2010
NL11.08.2010
SE11.08.2010
SK11.08.2010
BG11.11.2010
GR12.11.2010
PT13.12.2010
Former [2011/19]AT11.08.2010
BE11.08.2010
CY11.08.2010
DK11.08.2010
FI11.08.2010
NL11.08.2010
SE11.08.2010
BG11.11.2010
GR12.11.2010
PT13.12.2010
Former [2011/17]AT11.08.2010
BE11.08.2010
CY11.08.2010
FI11.08.2010
NL11.08.2010
SE11.08.2010
BG11.11.2010
GR12.11.2010
PT13.12.2010
Former [2011/15]AT11.08.2010
CY11.08.2010
FI11.08.2010
NL11.08.2010
SE11.08.2010
BG11.11.2010
GR12.11.2010
PT13.12.2010
Former [2011/13]AT11.08.2010
CY11.08.2010
FI11.08.2010
NL11.08.2010
BG11.11.2010
PT13.12.2010
Former [2011/11]AT11.08.2010
FI11.08.2010
NL11.08.2010
BG11.11.2010
PT13.12.2010
Former [2011/10]AT11.08.2010
FI11.08.2010
NL11.08.2010
PT13.12.2010
Former [2011/08]AT11.08.2010
NL11.08.2010
Documents cited:Search[Y] US6247138  (TAMURA HIROTAKA et al.) [Y] 1-12 * column 3, line 21 - line 49 * * column 4, line 33 - line 64 * * column 13, line 54 - column 14, line 8 * * column 25, line 36 - line 57 * * column 25, line 36 - line 57 * * column 28, line 39 - line 49 * * figures 2,8,9,38,55,60 *
 [A] US6078623  (ISOBE TADAAKI et al.) [A] 1,7 * column 13, line 46 - column 14, line 13; figure 13 *
 [Y]   NATSUKI KUSHIYAMA: "A 500-MEGABYTE/S DATA-RATE 4.5M DRAM", IEEE JOURNAL OF SOLID-STATE CIRCUITS, IEEE SERVICE CENTER, PISCATAWAY, NJ, US, vol. 28, no. 4, 1 April 1993 (1993-04-01), pages 490 - 498, XP000362979, ISSN: 0018-9200 [Y] 1-12 * page 493, column R, paragraph 3 - page 494, column L, paragraph 1 * * figures 6,7 *

DOI:   http://dx.doi.org/10.1109/4.210033
 [Y]   YIDO KOO ET AL: "A 4-400 MHz jitter-suppressed delay-locked loop with frequency division method", VLSI AND CAD, 1999. ICVC '99. 6TH INTERNATIONAL CONFERENCE ON SEOUL, SOUTH KOREA 26-27 OCT. 1999, PISCATAWAY, NJ, USA,IEEE, US, 26 October 1999 (1999-10-26), pages 339 - 341, XP010370138, ISBN: 0-7803-5727-2 [Y] 1-12 * page 339, column L, paragraph 2; figures 4,5 * * page 340, column L, line 1 - column R, line 2 *

DOI:   http://dx.doi.org/10.1109/ICVC.1999.820925
 [A]   "SLDRAM ARCHITECTURAL AND FUNCTIONAL OVERVIEW", SLDRAM ARCHITECTURAL AND FUNCTIONAL OVERVIEW, August 1997 (1997-08-01), pages 1 - 14, XP002101005 [A] 1,7 * page 10, paragraphs SLDRAM,CALIBRATION - page 11 *
 [A]   JOONBAE PARK ET AL: "A semi-digital delay locked loop for clock skew minimization", VLSI DESIGN, 1999. PROCEEDINGS. TWELFTH INTERNATIONAL CONFERENCE ON GOA, INDIA 7-10 JAN. 1999, LOS ALAMITOS, CA, USA,IEEE COMPUT. SOC, US, 7 January 1999 (1999-01-07), pages 584 - 588, XP010319965, ISBN: 0-7695-0013-7 [A] 1,7 * page 586, column R, paragraph 2.2 - page 587; figures 2,8 *
 [A]   "BINARLY WEIGHTED ELEMENT PULSE DELAY LINE", IBM TECHNICAL DISCLOSURE BULLETIN, IBM CORP. NEW YORK, US, vol. 39, no. 6, June 1996 (1996-06-01), pages 153 - 154, XP000678555, ISSN: 0018-8689 [A] 1,7 * the whole document *
ExaminationUS6047346
The EPO accepts no responsibility for the accuracy of data originating from other authorities; in particular, it does not guarantee that it is complete, up to date or fit for specific purposes.