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Extract from the Register of European Patents

EP About this file: EP1367719

EP1367719 - AD converter circuit and AD conversion method [Right-click to bookmark this link]
StatusThe application has been withdrawn
Status updated on  13.08.2004
Database last updated on 06.07.2024
Most recent event   Tooltip13.08.2004Withdrawal of applicationpublished on 29.09.2004  [2004/40]
Applicant(s)For all designated states
FUJITSU LIMITED
1-1, Kamikodanaka 4-chome, Nakahara-ku Kawasaki-shi
Kanagawa 211-8588 / JP
[N/P]
Former [2003/49]For all designated states
FUJITSU LIMITED
1-1, Kamikodanaka 4-chome, Nakahara-ku
Kawasaki-shi, Kanagawa 211-8588 / JP
Inventor(s)01 / Ito, Shogo
Fujitsu VLSI Limited, 1844-2, Kozoji-cho 2-chome
Kasugai-shi, Aichi 487-0013 / JP
02 / Suzuki, Hisao
Fujitsu VLSI Limited, 1844-2, Kozoji-cho 2-chome
Kasugai-shi, Aichi 487-0013 / JP
 [2003/49]
Representative(s)Seeger, Wolfgang
Seeger & Seeger
Patentanwälte & European Patent Attorneys
Georg-Hager-Strasse 40
81369 München / DE
[N/P]
Former [2003/49]Seeger, Wolfgang, Dipl.-Phys.
SEEGER & SEEGER Patentanwälte & European Patent Attorneys Georg-Hager-Strasse 40
81369 München / DE
Application number, filing date03003650.318.02.2003
[2003/49]
Priority number, dateJP2002015719030.05.2002         Original published format: JP 2002157190
[2003/49]
Filing languageEN
Procedural languageEN
PublicationType: A2 Application without search report 
No.:EP1367719
Date:03.12.2003
Language:EN
[2003/49]
Type: A3 Search report 
No.:EP1367719
Date:06.05.2004
[2004/19]
Search report(s)(Supplementary) European search report - dispatched on:EP23.03.2004
ClassificationIPC:H03M1/36, H03M1/14
[2004/19]
CPC:
H03M1/147 (EP,US); H03M1/34 (KR); H03M1/365 (EP,US)
Former IPC [2003/49]H03M1/14, // H03M1/36
Designated contracting statesAT,   BE,   BG,   CH,   CY,   CZ,   DE,   DK,   EE,   ES,   FI,   FR,   GB,   GR,   HU,   IE,   IT,   LI,   LU,   MC,   NL,   PT,   SE,   SI,   SK,   TR [2003/49]
Extension statesALNot yet paid
LTNot yet paid
LVNot yet paid
MKNot yet paid
RONot yet paid
TitleGerman:A/D-Wandlerschaltung und Verfahren zur A/D-Wandlung[2003/49]
English:AD converter circuit and AD conversion method[2003/49]
French:Circuit de convertisseur A/N et procédé de conversion A/N[2003/49]
Examination procedure26.07.2004Application withdrawn by applicant  [2004/40]
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Documents cited:Search[A]US4745393  (TSUKADA TOSHIRO [JP], et al) [A] 1-11 * column 1 - column 12; figures 1-9 *;
 [X]US5349354  (ITO MASAO [JP], et al) [X] 1-11 * column 1 - column 15; figures 5,6 *;
 [A]US5745067  (CHOU SHU-KUANG [TW], et al) [A] 1-11 * column 1 - column 6; figure 4 *;
 [A]US5923277  (TAKEDA HITOSHI [JP]) [A] 1-11* column 1 - column 10; figures 1,2 *
The EPO accepts no responsibility for the accuracy of data originating from other authorities; in particular, it does not guarantee that it is complete, up to date or fit for specific purposes.