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Extract from the Register of European Patents

EP About this file: EP1380848

EP1380848 - Device for measuring and analyzing electrical signals of an integrated circuit component [Right-click to bookmark this link]
StatusNo opposition filed within time limit
Status updated on  30.07.2010
Database last updated on 07.06.2024
Most recent event   Tooltip04.03.2011Lapse of the patent in a contracting state
New state(s): IT
published on 06.04.2011  [2011/14]
Applicant(s)For all designated states
Infineon Technologies AG
Am Campeon 1-12
85579 Neubiberg / DE
[2009/38]
Former [2004/03]For all designated states
Infineon Technologies AG
St.-Martin-Strasse 53
81669 München / DE
Inventor(s)01 / Schmid, Wilhelm
Am Mühlbach 6
85055 Ingolstadt / DE
02 / Dörrhöfer, Carsten
Wilhelm-Leibl-Strasse 21
83607 Holzkirchen / DE
 [2004/03]
Representative(s)Repkow, Ines, et al
Jannig & Repkow
Patentanwälte PartG mbB
Klausenberg 20
86199 Augsburg / DE
[N/P]
Former [2004/03]Repkow, Ines, Dr. Dipl.-Ing., et al
Jannig & Repkow Patentanwälte Klausenberg 20
86199 Augsburg / DE
Application number, filing date03016280.411.06.1999
[2004/03]
Priority number, dateDE1998102682516.06.1998         Original published format: DE 19826825
[2004/03]
Filing languageDE
Procedural languageDE
PublicationType: A2 Application without search report 
No.:EP1380848
Date:14.01.2004
Language:DE
[2004/03]
Type: A3 Search report 
No.:EP1380848
Date:27.06.2007
[2007/26]
Type: B1 Patent specification 
No.:EP1380848
Date:23.09.2009
Language:DE
[2009/39]
Search report(s)(Supplementary) European search report - dispatched on:EP24.05.2007
ClassificationIPC:G01R31/317, G01R31/316
[2004/03]
CPC:
G01R31/31708 (EP,US); G01R31/2884 (EP,US); G01R31/2886 (EP,US);
G01R31/31723 (EP,US); G01R31/318505 (EP,US); G01R31/318572 (EP,US);
G01R31/31926 (EP,US) (-)
Designated contracting statesDE,   DK,   FI,   FR,   GB,   IT,   SE [2008/10]
Former [2004/03]AT,  BE,  CH,  CY,  DE,  DK,  ES,  FI,  FR,  GB,  GR,  IE,  IT,  LI,  LU,  MC,  NL,  PT,  SE 
TitleGerman:Einrichtung zur Vermessung und Analyse von elektrischen Signalen eines integrierten Schaltungsbausteins[2004/03]
English:Device for measuring and analyzing electrical signals of an integrated circuit component[2004/03]
French:Dispositif pour mesurer et analyser des signaux électriques d'un circuit intégré[2004/03]
Examination procedure29.07.2003Examination requested  [2004/03]
19.03.2009Communication of intention to grant the patent
27.07.2009Fee for grant paid
27.07.2009Fee for publishing/printing paid
Parent application(s)   TooltipEP99938179.1  / EP1088239
Opposition(s)24.06.2010No opposition filed within time limit [2010/35]
Fees paidRenewal fee
18.07.2003Renewal fee patent year 03
18.07.2003Renewal fee patent year 04
18.07.2003Renewal fee patent year 05
24.06.2004Renewal fee patent year 06
23.06.2005Renewal fee patent year 07
21.06.2006Renewal fee patent year 08
21.06.2007Renewal fee patent year 09
17.06.2008Renewal fee patent year 10
18.06.2009Renewal fee patent year 11
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Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court.
Lapses during opposition  TooltipDK23.09.2009
FI23.09.2009
IT23.09.2009
SE23.09.2009
[2011/14]
Former [2010/35]DK23.09.2009
FI23.09.2009
SE23.09.2009
Former [2010/09]FI23.09.2009
SE23.09.2009
Documents cited:Search[A]EP0650069  (TEKTRONIX INC [US]) [A] 1-12 * column 1, line 20 - line 32 * * column 2, line 9 - column 3, line 16; figure 1 * * column 3, line 33 - line 40 *;
 [A]US5712858  (GODIWALA NITIN DHIROOBHAI [US], et al) [A] 1* column 4, line 59 - column 6, line 27; figure 2 *
The EPO accepts no responsibility for the accuracy of data originating from other authorities; in particular, it does not guarantee that it is complete, up to date or fit for specific purposes.