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EP1388933
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EP About this file: EP1388933
| EP1388933 - Direct conversion circuit with dc offset reduction [Right-click to bookmark this link] | |||
| Former [2004/07] | Direct conversion circuit capable of eliminating distirsion of base band signals | ||
| [2004/09] | Status | The application is deemed to be withdrawn Status updated on 13.01.2006 Database last updated on 06.07.2024 | Most recent event Tooltip | 13.01.2006 | Application deemed to be withdrawn | published on 01.03.2006 [2006/09] | Applicant(s) | For all designated states ALPS ELECTRIC CO., LTD. 1-7 Yukigaya Otsuka-cho Ota-ku Tokyo 145 / JP | [N/P] |
| Former [2004/07] | For all designated states ALPS ELECTRIC CO., LTD. 1-7 Yukigaya Otsuka-cho Ota-ku Tokyo 145 / JP | Inventor(s) | 01 /
Osada, Shigeru 1-7 Yukigaya, Otsuka-cho, Ota-ku Tokyo 145 / JP | [2004/07] | Representative(s) | Kensett, John Hinton Saunders & Dolleymore LLP 9 Rickmansworth Road Watford WD18 0JU / GB | [N/P] |
| Former [2004/07] | Kensett, John Hinton Saunders & Dolleymore, 9 Rickmansworth Road Watford, Hertfordshire WD18 0JU / GB | Application number, filing date | 03254872.9 | 05.08.2003 | [2004/07] | Priority number, date | JP20020230442 | 07.08.2002 Original published format: JP 2002230442 | [2004/07] | Filing language | EN | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | EP1388933 | Date: | 11.02.2004 | Language: | EN | [2004/07] | Type: | A3 Search report | No.: | EP1388933 | Date: | 19.05.2004 | [2004/21] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 05.04.2004 | Classification | IPC: | H03D3/00 | [2004/07] | CPC: |
H03D7/166 (EP,US)
| Designated contracting states | DE, FR, GB [2005/06] |
| Former [2004/07] | AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HU, IE, IT, LI, LU, MC, NL, PT, RO, SE, SI, SK, TR | Title | German: | Direktkonversionsempfänger unter Verwendung von DC-Offset-Reduction | [2004/07] | English: | Direct conversion circuit with dc offset reduction | [2004/09] | French: | Récepteur à conversion directe utilisant reduction de décalage en continu | [2004/09] |
| Former [2004/07] | Direct conversion circuit capable of eliminating distirsion of base band signals | ||
| Former [2004/07] | Récepteru à conversion directe utilisant reduction de décalage en continu | Examination procedure | 01.07.2004 | Examination requested [2004/36] | 13.04.2005 | Despatch of a communication from the examining division (Time limit: M04) | 24.08.2005 | Application deemed to be withdrawn, date of legal effect [2006/09] | 27.09.2005 | Despatch of communication that the application is deemed to be withdrawn, reason: reply to the communication from the examining division not received in time [2006/09] | Fees paid | Penalty fee | Additional fee for renewal fee | 31.08.2005 | 03 M06 Not yet paid |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [A]EP0877476 (NOKIA MOBILE PHONES LTD [FI]) [A] 1 * page 4, line 35 - page 6, line 27; figure 3 *; | [A]US6192225 (ARPAIA DOMENICO [US], et al) [A] 1 * column 5, line 21 - line 50; figure 5 *; | [PA]EP1233526 (MATSUSHITA ELECTRIC IND CO LTD [JP]) [PA] 1* column 4, line 30 - column 8, line 32; figure 2 * |