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EP1469600
European procedure
Extract from the Register of European Patents
EP About this file: EP1469600
| EP1469600 - NONLINEAR RESISTOR CIRCUIT USING FLOATING GATE MOSFETS [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 02.05.2008 Database last updated on 03.10.2024 | Most recent event Tooltip | 26.09.2008 | Change - representative | published on 29.10.2008 [2008/44] | Applicant(s) | For all designated states Japan Science and Technology Agency 1-8, Honcho 4-chome Kawaguchi-shi Saitama 332-0012 / JP | [2007/26] |
| Former [2004/43] | For all designated states Japan Science and Technology Agency 1-8, Honcho 4-chome Kawaguchi-shi, Saitama 332-0012 / JP | Inventor(s) | 01 /
HORIO, Yoshihiko 17-40-604, Chuo 1-chome Warabi-shi, Saitama 335-0004 / JP | 02 /
FUJIWARA, Tetsuya 17-18, Nakazato Hiratsuka-shi, Kanagawa 254-0054 / JP | 03 /
AIHARA, Kazuyuki 8-8-208, Yatsu 4-chome Narashino-shi, Chiba 275-0026 / JP | [2004/43] | Representative(s) | Hoarton, Lloyd Douglas Charles Forresters IP LLP Skygarden Erika-Mann-Strasse 11 80636 München / DE | [N/P] |
| Former [2008/44] | Hoarton, Lloyd Douglas Charles Forrester & Boehmert Pettenkoferstrasse 20-22 80336 Munich / DE | ||
| Former [2004/43] | Hoarton, Lloyd Douglas Charles Forrester & Boehmert, Pettenkoferstrasse 20-22 80336 München / DE | Application number, filing date | 03701832.2 | 22.01.2003 | [2004/43] | WO2003JP00513 | Priority number, date | JP20020014989 | 24.01.2002 Original published format: JP 2002014989 | [2004/43] | Filing language | JA | Procedural language | EN | Publication | Type: | A1 Application with search report | No.: | WO03063349 | Date: | 31.07.2003 | Language: | EN | [2003/31] | Type: | A1 Application with search report | No.: | EP1469600 | Date: | 20.10.2004 | Language: | EN | The application published by WIPO in one of the EPO official languages on 31.07.2003 takes the place of the publication of the European patent application. | [2004/43] | Type: | B1 Patent specification | No.: | EP1469600 | Date: | 27.06.2007 | Language: | EN | [2007/26] | Search report(s) | International search report - published on: | JP | 31.07.2003 | (Supplementary) European search report - dispatched on: | EP | 05.04.2005 | Classification | IPC: | H03H11/52 | [2004/43] | CPC: |
H03H11/53 (EP,US);
H03H11/52 (EP,US)
| Designated contracting states | CH, DE, FR, GB, LI [2007/26] |
| Former [2004/43] | AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HU, IE, IT, LI, LU, MC, NL, PT, SE, SI, SK, TR | Extension states | AL | Not yet paid | LT | Not yet paid | LV | Not yet paid | MK | Not yet paid | RO | Not yet paid | Title | German: | NICHTLINEARE WIDERSTANDSSCHALTUNG MIT FLOATING-GATE-MOSFETS | [2004/43] | English: | NONLINEAR RESISTOR CIRCUIT USING FLOATING GATE MOSFETS | [2004/43] | French: | CIRCUIT DE RESISTANCE NON LINEAIRE UTILISANT DES TRANSISTORS A EFFET DE CHAMP A PORTEE ISOLEE A GRILLE FLOTTANTE | [2004/43] | Entry into regional phase | 20.07.2004 | Translation filed | 20.07.2004 | National basic fee paid | 20.07.2004 | Search fee paid | 20.07.2004 | Designation fee(s) paid | 20.07.2004 | Examination fee paid | Examination procedure | 20.06.2003 | Request for preliminary examination filed International Preliminary Examining Authority: JP | 20.07.2004 | Examination requested [2004/43] | 28.06.2005 | Despatch of a communication from the examining division (Time limit: M06) | 20.12.2005 | Reply to a communication from the examining division | 18.12.2006 | Communication of intention to grant the patent | 27.04.2007 | Fee for grant paid | 27.04.2007 | Fee for publishing/printing paid | Opposition(s) | 28.03.2008 | No opposition filed within time limit [2008/23] | Fees paid | Renewal fee | 12.01.2005 | Renewal fee patent year 03 | 12.01.2006 | Renewal fee patent year 04 | 12.01.2007 | Renewal fee patent year 05 |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [Y]FR75916E (INT STANDARD ELECTRIC CORP) [Y] 1,4-13 * page 1, column L, paragraph 2; figures 1-4,7-10 * * page 4, column RH, paragraph 4 - page 5, column LH, paragraph 2 * * page 8, column R, paragraph 6 - page 9, column R, paragraph 2 * * page 13, column L, paragraph 6 - column R, paragraph 1 *; | [X] - FUJIWARA T ET AL, "N-TYPE NONLINEAR RESISTOR CIRCUITS USING FLOATING-GATE MOSFETs", DENSHI JOHO TSUSHIN GAKKAI GIJUTSU KUNKYU HOKOKU - IEICE TECHNICAL REPORT, DENSHI JOHO TSUSHIN GAKKAI, TOKYO, JP, (20020122), vol. 101, no. 614, ISSN 0913-5685, pages 15 - 22,i, XP009042737 [X] 1,4-13 * the whole document * | [Y] - HORIO, Y., WATARAI, K., AIHARA, K., "Nonlinear resistor circuits using capacitively coupled multi-input MOSFETs", IEICE TRANS. FUNDAMENTALS, (199909), vol. E82-A, no. 9, XP009042396 [Y] 1,4-13 * the whole document * | [A] - CHUA L O ET AL, "BIPOLAR - JFET - MOSFET NEGATIVE RESISTANCE DEVICES", IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS, IEEE INC. NEW YORK, US, (19970204), vol. CAS-32, no. 1, pages 46 - 61, XP002024214 [A] 1,4-13 * page 46, column R, paragraph 2; figures 1a,3-8,25-31 * *Appendix A*; page 48, column R, paragraph 1 - page 49, column R, paragraph 4 * * page 52, column L, paragraph 3 - column R, paragraph 1 * | International search | [A]JP2000068788 (JAPAN SCIENCE & TECH CORP); | [Y]JPS393222B |