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Extract from the Register of European Patents

EP About this file: EP1589662

EP1589662 - Correction for DC-offset in a phase locked loop [Right-click to bookmark this link]
StatusNo opposition filed within time limit
Status updated on  26.12.2008
Database last updated on 02.11.2024
Most recent event   Tooltip27.11.2009Lapse of the patent in a contracting statepublished on 30.12.2009  [2009/53]
Applicant(s)For all designated states
Avago Technologies General IP (Singapore) Pte. Ltd
No. 1 Yishun Avenue 7
Singapore 768923 / SG
[2006/52]
Former [2005/43]For all designated states
AGILENT TECHNOLOGIES, INC.(a Delaware Corporation)
395 Page Mill Road Palo Alto
California 94306 / US
Inventor(s)01 / Galloway, Brian Jeffrey
785 W. Latimer Ave
Campbel CA 95008 / US
02 / Steinbach, Gunter Willy
4267 Pomona Ave
Palo Alto CA 94306 / US
 [2005/43]
Representative(s)Dilg, Haeusler, Schindelmann Patentanwaltsgesellschaft mbH
Leonrodstraße 58
80636 München / DE
[N/P]
Former [2007/37]Dilg, Haeusler, Schindelmann Patentanwaltsgesellschaft mbH
Nußbaumstrasse 6
80336 München / DE
Former [2005/43]Schoppe, Fritz, et al
Schoppe, Zimmermann, Stöckeler & Zinkler Patentanwälte Postfach 246
82043 Pullach bei München / DE
Application number, filing date04026863.311.11.2004
[2005/43]
Priority number, dateUS2004083099823.04.2004         Original published format: US 830998
[2005/43]
Filing languageEN
Procedural languageEN
PublicationType: A1 Application with search report 
No.:EP1589662
Date:26.10.2005
Language:EN
[2005/43]
Type: B1 Patent specification 
No.:EP1589662
Date:20.02.2008
Language:EN
[2008/08]
Search report(s)(Supplementary) European search report - dispatched on:EP29.04.2005
ClassificationIPC:H03L7/08, H03L7/091
[2005/43]
CPC:
H03L7/091 (EP,US); H03L7/0807 (EP,US)
Designated contracting statesDE,   FR,   GB [2006/27]
Former [2005/43]AT,  BE,  BG,  CH,  CY,  CZ,  DE,  DK,  EE,  ES,  FI,  FR,  GB,  GR,  HU,  IE,  IS,  IT,  LI,  LU,  MC,  NL,  PL,  PT,  RO,  SE,  SI,  SK,  TR 
TitleGerman:Kompensierung des DC-Offsets in einer Phasenregelschleife[2005/43]
English:Correction for DC-offset in a phase locked loop[2005/43]
French:Correction du décalage en tension continu dans une boucle à verrouillage de phase[2005/43]
Examination procedure27.01.2006Examination requested  [2006/13]
20.03.2006Despatch of a communication from the examining division (Time limit: M04)
31.07.2006Reply to a communication from the examining division
07.05.2007Despatch of a communication from the examining division (Time limit: M02)
09.05.2007Reply to a communication from the examining division
15.06.2007Despatch of a communication from the examining division (Time limit: M02)
19.07.2007Reply to a communication from the examining division
14.09.2007Communication of intention to grant the patent
03.01.2008Fee for grant paid
03.01.2008Fee for publishing/printing paid
Opposition(s)21.11.2008No opposition filed within time limit [2009/05]
Fees paidRenewal fee
27.11.2006Renewal fee patent year 03
12.12.2007Renewal fee patent year 04
Penalty fee
Additional fee for renewal fee
30.11.200704   M06   Fee paid on   12.12.2007
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Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court.
Lapses during opposition  TooltipGB11.11.2008
[2010/01]
Documents cited:Search[A]US6337650  (MITSUTANI NAOKI [JP]) [A] 1-10 * abstract *;
 [A]US2002021470  (SAVOJ JAFAR [US]) [A] 1-10* abstract *;
 [X]US6404363  (PARK HYUN-SOO [KR], et al) [X] 1,3 * column 3, line 40 - column 4, line 19 * * column 7, line 36 - line 43 * * figures 2,6 *;
 [A]US2003007222  (KWASAKI WATARU [JP], et al) [A] 1-10 * paragraphs [0038] - [0064]; figures 1,2,6 *;
 [A]US2004062336  (KUWATA NAOKI [JP], et al) [A] 1-10 * paragraph [0068]; figure 14 *
The EPO accepts no responsibility for the accuracy of data originating from other authorities; in particular, it does not guarantee that it is complete, up to date or fit for specific purposes.