EP1605602 - Interference reduction apparatus and method [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 06.01.2012 Database last updated on 07.10.2024 | Most recent event Tooltip | 06.01.2012 | No opposition filed within time limit | published on 08.02.2012 [2012/06] | Applicant(s) | For all designated states FUJITSU LIMITED 1-1, Kamikodanaka 4-chome, Nakahara-ku Kawasaki-shi Kanagawa 211-8588 / JP | [2011/09] |
Former [2005/50] | For all designated states FUJITSU LIMITED 1-1, Kamikodanaka 4-chome, Nakahara-ku Kawasaki-shi Kanagawa 211-8588 / JP | Inventor(s) | 01 /
Shimizu, Masahiko, c/o Fujitsu Limited 1-1, Kamikodanaka 4-chome Nakahara-ku Kawasaki-shi Kanagawa 211-8588 / JP | 02 /
Hasegawa, Tsuyoshi, c/o Fujitsu Limited 1-1, Kamikodanaka 4-chome Nakahara-ku Kawasaki-shi Kanagawa 211-8588 / JP | [2005/50] | Representative(s) | Hitching, Peter Matthew, et al Haseltine Lake LLP Lincoln House, 5th Floor 300 High Holborn London WC1V 7JH / GB | [N/P] |
Former [2005/50] | Hitching, Peter Matthew, et al Haseltine Lake & Co., Imperial House, 15-19 Kingsway London WC2B 6UD / GB | Application number, filing date | 04257311.3 | 25.11.2004 | [2005/50] | Priority number, date | JP20040173793 | 11.06.2004 Original published format: JP 2004173793 | [2005/50] | Filing language | EN | Procedural language | EN | Publication | Type: | A1 Application with search report | No.: | EP1605602 | Date: | 14.12.2005 | Language: | EN | [2005/50] | Type: | B1 Patent specification | No.: | EP1605602 | Date: | 02.03.2011 | Language: | EN | [2011/09] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 27.09.2005 | Classification | IPC: | H04B1/707 | [2005/50] | CPC: |
H04B1/7113 (EP,US);
H04B1/7115 (EP,US);
H04B1/7107 (EP,US);
H04B1/712 (EP,US);
H04B2201/70702 (EP,US)
| Designated contracting states | DE, FR, GB [2006/34] |
Former [2005/50] | AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HU, IE, IS, IT, LI, LU, MC, NL, PL, PT, RO, SE, SI, SK, TR | Title | German: | Interferenzverminderung-Vorrichtung und -Verfahren | [2005/50] | English: | Interference reduction apparatus and method | [2005/50] | French: | Appareil de réduction des interférences et méthode | [2005/50] | Examination procedure | 13.02.2006 | Examination requested [2006/15] | 17.03.2006 | Despatch of a communication from the examining division (Time limit: M06) | 27.09.2006 | Reply to a communication from the examining division | 02.07.2007 | Despatch of a communication from the examining division (Time limit: M06) | 14.01.2008 | Reply to a communication from the examining division | 28.04.2008 | Despatch of a communication from the examining division (Time limit: M04) | 21.07.2008 | Reply to a communication from the examining division | 14.09.2010 | Communication of intention to grant the patent | 12.01.2011 | Fee for grant paid | 12.01.2011 | Fee for publishing/printing paid | Divisional application(s) | EP08100721.3 / EP1926219 | Opposition(s) | 05.12.2011 | No opposition filed within time limit [2012/06] | Fees paid | Renewal fee | 29.11.2006 | Renewal fee patent year 03 | 28.11.2007 | Renewal fee patent year 04 | 17.03.2008 | Renewal fee patent year 05 | 27.11.2009 | Renewal fee patent year 06 | 30.11.2010 | Renewal fee patent year 07 |
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Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [A]EP0876002 (LUCENT TECHNOLOGIES INC [US]) [A] 1-20 * the whole document *; | [A]US6175587 (MADHOW UPAMANYU [US], et al) [A] 1-20 * the whole document *; | [A]US2002131479 (BUTLER BRIAN K [US], et al) [A] 1-20 * the whole document *; | [Y]EP1304815 (UNIV SINGAPORE [SG]) [Y] 1-20 * abstract * * paragraph [0077] - paragraph [0079] * * paragraph [0065] - paragraph [0067] * * paragraph [0053] - paragraph [0059] *; | [Y]US2003086482 (SHIMIZU MASAHIKO [JP], et al) [Y] 1-20 * the whole document *; | [Y]WO2004025860 (FUJITSU LTD [JP], et al) [Y] 1-20* the whole document *; | [E]EP1548953 (FUJITSU LTD [JP]) [E] 1-20 * the whole document *; | [Y] - HASEGAWA T ET AL, "MULTIPATH INTERFERENCE REDUCTION METHOD USING MULTIPATH INTERFERENCE CORRELATIVE TIMING FOR DS-CDMA SYSTEMS", VTC SPRING 2002. IEEE 55TH. VEHICULAR TECHNOLOGY CONFERENCE. PROCEEDINGS. BIRMINGHAM, AL, MAY 6 - 9, 2002, IEEE VEHICULAR TECHNOLGY CONFERENCE, NEW YORK, NY : IEEE, US, (20020506), VOL. 3 OF 4. CONF. 55, ISBN 0-7803-7484-3, pages 1205 - 1209, XP001214486 [Y] 1-20 * the whole document * DOI: http://dx.doi.org/10.1109/VTC.2002.1002805 |