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Extract from the Register of European Patents

EP About this file: EP1636725

EP1636725 - CIRCUIT REGISTER AND METHOD THEREFOR [Right-click to bookmark this link]
Former [2006/12]INTEGRATED CIRCUIT DEVELOPMENT SYSTEM
[2016/37]
StatusNo opposition filed within time limit
Status updated on  22.03.2019
Database last updated on 30.10.2024
FormerThe patent has been granted
Status updated on  13.04.2018
FormerGrant of patent is intended
Status updated on  03.01.2018
FormerExamination is in progress
Status updated on  14.03.2017
FormerGrant of patent is intended
Status updated on  10.11.2016
Most recent event   Tooltip26.06.2020Lapse of the patent in a contracting state
New state(s): CY
published on 29.07.2020  [2020/31]
Applicant(s)For all designated states
Imagination Technologies Limited
Imagination House, Home Park Estate
Kings Langley, Hertfordshire WD4 8LZ / GB
[2013/49]
Former [2009/27]For all designated states
Nethra Imaging, Inc.
2855 Bowers Ave.
Santa Clara, CA 95051 / US
Former [2006/12]For all designated states
Ambric Inc.
15655 SW Greystone Court, Suite 150
Beaverton, Oregon 97006-6007 / US
Inventor(s)01 / JONES, Anthony Mark
1225 NW Murray Rd.
Suite 202
Portland, OR 97229 / US
02 / WASSON, Paul M.
1225 NW Murray Rd.
Suite 202
Portland, OR 97229 / US
 [2018/20]
Former [2006/12]01 / JONES, Anthony Mark
1225 NW Murray Rd., Suite 202
Portland, OR 97229 / US
02 / WASSON, Paul M.
1225 NW Murray Rd., Suite 202
Portland, OR 97229 / US
Representative(s)CMS Cameron McKenna Nabarro Olswang LLP
Cannon Place
78 Cannon Street
London EC4N 6AF / GB
[2018/20]
Former [2013/29]Wallis, Helen Frances Mary
Olswang LLP 90 High Holborn
London WC1V 6XX / GB
Former [2006/12]Betten & Resch
Patentanwälte, Theatinerstrasse 8
80333 München / DE
Application number, filing date04755597.418.06.2004
[2006/12]
WO2004US19510
Priority number, dateUS20030479759P18.06.2003         Original published format: US 479759 P
[2006/12]
Filing languageEN
Procedural languageEN
PublicationType: A2 Application without search report
No.:WO2004114166
Date:29.12.2004
Language:EN
[2004/53]
Type: A2 Application without search report 
No.:EP1636725
Date:22.03.2006
Language:EN
The application published by WIPO in one of the EPO official languages on 29.12.2004 takes the place of the publication of the European patent application.
[2006/12]
Type: B1 Patent specification 
No.:EP1636725
Date:16.05.2018
Language:EN
[2018/20]
Search report(s)International search report - published on:EP29.12.2005
ClassificationIPC:G06F17/50, G06F5/06
[2006/12]
CPC:
G06F30/30 (EP,US)
Designated contracting statesAT,   BE,   BG,   CH,   CY,   CZ,   DE,   DK,   EE,   ES,   FI,   FR,   GB,   GR,   HU,   IE,   IT,   LI,   LU,   MC,   NL,   PL,   PT,   RO,   SE,   SI,   SK,   TR [2018/20]
Former [2006/12]AT,  BE,  BG,  CH,  CY,  CZ,  DE,  DK,  EE,  ES,  FI,  FR,  GB,  GR,  HU,  IE,  IT,  LI,  LU,  MC,  NL,  PL,  PT,  RO,  SE,  SI,  SK,  TR 
TitleGerman:REGISTER FÜR EINEN INTEGRIERTEN SCHALTKREIS UND METHODE DAFÜR[2016/37]
English:CIRCUIT REGISTER AND METHOD THEREFOR[2016/37]
French:REGISTRE D'UN CIRCUIT INTEGRE ET PROCÉDÉ ASSOCIÉ[2016/37]
Former [2006/12]ENTWICKLUNGSSYSTEM FÜR INTEGRIERTE SCHALTUNGEN
Former [2006/12]INTEGRATED CIRCUIT DEVELOPMENT SYSTEM
Former [2006/12]SYSTEME DE MISE AU POINT D'UN CIRCUIT INTEGRE
Entry into regional phase12.01.2006National basic fee paid 
12.01.2006Designation fee(s) paid 
12.01.2006Examination fee paid 
Examination procedure12.01.2006Examination requested  [2006/12]
28.12.2006Despatch of a communication from the examining division (Time limit: M06)
09.07.2007Reply to a communication from the examining division
30.09.2013Despatch of a communication from the examining division (Time limit: M04)
31.01.2014Reply to a communication from the examining division
13.02.2015Despatch of a communication from the examining division (Time limit: M04)
22.06.2015Reply to a communication from the examining division
11.11.2016Communication of intention to grant the patent
10.03.2017Disapproval of the communication of intention to grant the patent by the applicant or resumption of examination proceedings by the EPO
16.11.2017Cancellation of oral proceeding that was planned for 04.12.2017
04.12.2017Date of oral proceedings (cancelled)
04.01.2018Communication of intention to grant the patent
03.04.2018Fee for grant paid
03.04.2018Fee for publishing/printing paid
03.04.2018Receipt of the translation of the claim(s)
Divisional application(s)The date of the Examining Division's first communication in respect of the earliest application for which a communication has been issued is  28.12.2006
Opposition(s)19.02.2019No opposition filed within time limit [2019/17]
Fees paidRenewal fee
14.06.2006Renewal fee patent year 03
14.06.2007Renewal fee patent year 04
31.03.2008Renewal fee patent year 05
27.07.2009Renewal fee patent year 06
11.06.2010Renewal fee patent year 07
27.06.2011Renewal fee patent year 08
26.06.2012Renewal fee patent year 09
06.06.2013Renewal fee patent year 10
31.03.2014Renewal fee patent year 11
19.06.2015Renewal fee patent year 12
27.06.2016Renewal fee patent year 13
27.06.2017Renewal fee patent year 14
Penalty fee
Additional fee for renewal fee
30.06.200906   M06   Fee paid on   27.07.2009
Opt-out from the exclusive  Tooltip
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See the Register of the Unified Patent Court for opt-out data
Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court.
Lapses during opposition  TooltipHU18.06.2004
AT16.05.2018
CY16.05.2018
CZ16.05.2018
DK16.05.2018
EE16.05.2018
ES16.05.2018
FI16.05.2018
IT16.05.2018
MC16.05.2018
NL16.05.2018
PL16.05.2018
PT16.05.2018
RO16.05.2018
SE16.05.2018
SI16.05.2018
SK16.05.2018
TR16.05.2018
IE18.06.2018
LU18.06.2018
BE30.06.2018
CH30.06.2018
LI30.06.2018
BG16.08.2018
GR17.08.2018
[2020/31]
Former [2020/27]HU18.06.2004
AT16.05.2018
CZ16.05.2018
DK16.05.2018
EE16.05.2018
ES16.05.2018
FI16.05.2018
IT16.05.2018
MC16.05.2018
NL16.05.2018
PL16.05.2018
PT16.05.2018
RO16.05.2018
SE16.05.2018
SI16.05.2018
SK16.05.2018
TR16.05.2018
IE18.06.2018
LU18.06.2018
BE30.06.2018
CH30.06.2018
LI30.06.2018
BG16.08.2018
GR17.08.2018
Former [2020/16]AT16.05.2018
CZ16.05.2018
DK16.05.2018
EE16.05.2018
ES16.05.2018
FI16.05.2018
IT16.05.2018
MC16.05.2018
NL16.05.2018
PL16.05.2018
RO16.05.2018
SE16.05.2018
SI16.05.2018
SK16.05.2018
TR16.05.2018
IE18.06.2018
LU18.06.2018
BE30.06.2018
CH30.06.2018
LI30.06.2018
BG16.08.2018
GR17.08.2018
Former [2019/26]AT16.05.2018
CZ16.05.2018
DK16.05.2018
EE16.05.2018
ES16.05.2018
FI16.05.2018
IT16.05.2018
MC16.05.2018
NL16.05.2018
PL16.05.2018
RO16.05.2018
SE16.05.2018
SI16.05.2018
SK16.05.2018
IE18.06.2018
LU18.06.2018
BE30.06.2018
CH30.06.2018
LI30.06.2018
BG16.08.2018
GR17.08.2018
Former [2019/24]AT16.05.2018
CZ16.05.2018
DK16.05.2018
EE16.05.2018
ES16.05.2018
FI16.05.2018
IT16.05.2018
MC16.05.2018
NL16.05.2018
PL16.05.2018
RO16.05.2018
SE16.05.2018
SK16.05.2018
IE18.06.2018
LU18.06.2018
BE30.06.2018
CH30.06.2018
LI30.06.2018
BG16.08.2018
GR17.08.2018
Former [2019/21]AT16.05.2018
CZ16.05.2018
DK16.05.2018
EE16.05.2018
ES16.05.2018
FI16.05.2018
IT16.05.2018
MC16.05.2018
NL16.05.2018
PL16.05.2018
RO16.05.2018
SE16.05.2018
SK16.05.2018
IE18.06.2018
LU18.06.2018
CH30.06.2018
LI30.06.2018
BG16.08.2018
GR17.08.2018
Former [2019/19]AT16.05.2018
CZ16.05.2018
DK16.05.2018
EE16.05.2018
ES16.05.2018
FI16.05.2018
IT16.05.2018
MC16.05.2018
NL16.05.2018
PL16.05.2018
RO16.05.2018
SE16.05.2018
SK16.05.2018
IE18.06.2018
LU18.06.2018
BG16.08.2018
GR17.08.2018
Former [2019/17]AT16.05.2018
CZ16.05.2018
DK16.05.2018
EE16.05.2018
ES16.05.2018
FI16.05.2018
IT16.05.2018
MC16.05.2018
NL16.05.2018
PL16.05.2018
RO16.05.2018
SE16.05.2018
SK16.05.2018
LU18.06.2018
BG16.08.2018
GR17.08.2018
Former [2019/15]AT16.05.2018
CZ16.05.2018
DK16.05.2018
EE16.05.2018
ES16.05.2018
FI16.05.2018
IT16.05.2018
MC16.05.2018
NL16.05.2018
PL16.05.2018
RO16.05.2018
SE16.05.2018
SK16.05.2018
BG16.08.2018
GR17.08.2018
Former [2019/11]AT16.05.2018
CZ16.05.2018
DK16.05.2018
EE16.05.2018
ES16.05.2018
FI16.05.2018
IT16.05.2018
NL16.05.2018
PL16.05.2018
RO16.05.2018
SE16.05.2018
SK16.05.2018
BG16.08.2018
GR17.08.2018
Former [2019/10]AT16.05.2018
CZ16.05.2018
DK16.05.2018
EE16.05.2018
ES16.05.2018
FI16.05.2018
NL16.05.2018
PL16.05.2018
RO16.05.2018
SE16.05.2018
SK16.05.2018
BG16.08.2018
GR17.08.2018
Former [2019/09]DK16.05.2018
EE16.05.2018
ES16.05.2018
FI16.05.2018
NL16.05.2018
SE16.05.2018
BG16.08.2018
GR17.08.2018
Former [2019/08]DK16.05.2018
ES16.05.2018
FI16.05.2018
NL16.05.2018
SE16.05.2018
BG16.08.2018
GR17.08.2018
Former [2018/52]ES16.05.2018
FI16.05.2018
NL16.05.2018
SE16.05.2018
BG16.08.2018
GR17.08.2018
Former [2018/49]ES16.05.2018
FI16.05.2018
SE16.05.2018
BG16.08.2018
Former [2018/47]ES16.05.2018
FI16.05.2018
Cited inInternational search[Y]WO9939288  (TERA SYSTEMS INC [US]) [Y] 67-80* abstract; figures 5 and 6 *;
 [Y]US6308229  (MASTELLER STEVEN ROBERT [US]) [Y] 3 * figures 1,3a *;
 [Y]WO02080044  (XILINX INC [US]) [Y] 21-39,41-80 * page 3, line 18-page 4, line 14 *;
 [X]  - LU ET.AL., "Performance Analysis and Efficient Implementation of Latency Insensitive Systems", TECHNICAL REPORT TR-ECE03-06, SCHOOL OF ELECTRICAL & COMPUTER ENGINEERING, PURDUE UNIVERSITY, (200303), URL: www.engineering.purdue.edu/ECE/Research/TR/2000pdfs/TR/2003pdfs/TR-ECE-03-06.pdf, (20050722), XP002337839 [X] 1,4-8,18-20 * Page 1, second paragraph; section 5 *
 [XY]  - CHELCEA T ET AL, "A low-latency FIFO for mixed-clock systems", IEEE COMPUT SOCIETY, Proceedings IEEE Computer Society Workshop on VLSI 2000. System Design for a System-on-Chip Era, (20000427), pages 119 - 126, XP010379677 [X] 1,2,4-20 * page 3, right column, third paragraph; sections 4 and 5 * [Y] 3
 [XY]  - CARLONI L P ET AL, "A methodology for correct-by-construction latency insensitive design", COMPUTER-AIDED DESIGN, 1999. DIGEST OF TECHNICAL PAPERS. 1999 IEEE/ACM INTERNATIONAL CONFERENCE ON SAN JOSE, CA, USA 7-11 NOV. 1999, PISCATAWAY, NJ, USA,IEEE, US, (19991107), ISBN 0-7803-5832-5, pages 309 - 315, XP010363870 [X] 1,2,9,18-20,40 * abstract, sections 2, 5 and 6, figure 5 * [Y] 21-39,41-80,3

DOI:   http://dx.doi.org/10.1109/ICCAD.1999.810667
 [PA]  - RUIBING LU ET AL, "Performance optimization of latency insensitive systems through buffer queue sizing of communication channels", IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER AIDED DESIGN. ICCAD 2003. IEEE/ACM DIGEST OF TECHNICAL PAPERS. SAN JOSE, CA, NOV. 9 - 13, 2003, IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER-AIDED DESIGN, NEW YORK, NY : ACM, US, (20031109), ISBN 1-58113-762-1, pages 227 - 231, XP010677157 [PA] 1-20 * column L, paragraph 1 - page 1, column R, paragraph 2 *
 [PX]  - CASU M R ET AL, "Issues in implementing latency insensitive protocols", DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION, 2004. PROCEEDINGS FEB. 16-20, 2004, PISCATAWAY, NJ, USA,IEEE, (20040216), vol. 2, ISBN 0-7695-2085-5, pages 1390 - 1391, XP010684987 [PX] 1,2,4-20 * page 1, column L, line 1 - page 1, column R, line 3 *

DOI:   http://dx.doi.org/10.1109/DATE.2004.1269102
 [Y]  - CHANDRANMENON G P ET AL, "RECONSIDERING FRAGMENTATION AND REASSEMBLY", PROCEEDINGS OF THE 17TH ANNUAL ACM SYMPOSIUM ON PRINCIPLES OF DISTRIBUTED COMPUTING.PODC 1998. PUERTO VALLARTA, MEXICO, JUNE 28 - JULY 2, 1998, ACM SIGACT - SIGMOD SYMPOSIUM ON PRINCIPLES OF DISTRIBUTED COMPUTING, NEW YORK, NY : ACM, US, (19980628), ISBN 0-89791-877-7, pages 21 - 29, XP002921718 [Y] 21-39,41-66 * abstract, lines 1-6 *
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