EP1787318 - METHOD OF FORMING ULTRA SHALLOW JUNCTIONS [Right-click to bookmark this link] | Status | The application is deemed to be withdrawn Status updated on 15.05.2009 Database last updated on 07.10.2024 | Most recent event Tooltip | 15.05.2009 | Application deemed to be withdrawn | published on 17.06.2009 [2009/25] | Applicant(s) | For all designated states Wafermasters, Incorporated 246 East Gish Road San Jose, CA 95112 / US | [2007/21] | Inventor(s) | 01 /
YOO, Woo Sik 4180 Wallis Ct. Palo Alto, California 94306 / US | [2007/35] |
Former [2007/21] | 01 /
YOO, Woo Sik 3090 Stelling Drive Palo Alto, California 94303 / US | Representative(s) | Hörner, Andreas HOEGER, STELLRECHT & PARTNER Patentanwälte Uhlandstrasse 14 c 70182 Stuttgart / DE | [N/P] |
Former [2007/21] | Hörner, Andreas HOEGER, STELLRECHT & PARTNER Patentanwälte Uhlandstrasse 14 c 70182 Stuttgart / DE | Application number, filing date | 05762908.1 | 22.06.2005 | [2007/21] | WO2005US22006 | Priority number, date | US20040916182 | 10.08.2004 Original published format: US 916182 | [2007/21] | Filing language | EN | Procedural language | EN | Publication | Type: | A2 Application without search report | No.: | WO2006023044 | Date: | 02.03.2006 | Language: | EN | [2006/09] | Type: | A2 Application without search report | No.: | EP1787318 | Date: | 23.05.2007 | Language: | EN | The application published by WIPO in one of the EPO official languages on 02.03.2006 takes the place of the publication of the European patent application. | [2007/21] | Search report(s) | International search report - published on: | US | 01.03.2007 | (Supplementary) European search report - dispatched on: | EP | 29.08.2008 | Classification | IPC: | H01L21/265, H01L21/22, H01L29/167 | [2008/36] | CPC: |
H01L21/26513 (EP,KR,US);
H01L29/0847 (KR);
H01L29/66575 (EP,KR,US);
H01L29/6659 (EP,KR,US)
|
Former IPC [2007/21] | H01L21/22, H01L29/167 | Designated contracting states | DE, NL [2008/11] |
Former [2007/21] | AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HU, IE, IS, IT, LI, LT, LU, MC, NL, PL, PT, RO, SE, SI, SK, TR | Extension states | AL | Not yet paid | BA | Not yet paid | HR | Not yet paid | LV | Not yet paid | MK | Not yet paid | YU | Not yet paid | Title | German: | VERFAHREN ZUR BILDUNG VON ULTRAFLACHEN VERBINDUNGEN | [2007/21] | English: | METHOD OF FORMING ULTRA SHALLOW JUNCTIONS | [2007/21] | French: | PROCEDE DE FORMATION DE JONCTIONS ULTRA-MINCES | [2007/21] | Entry into regional phase | 07.02.2007 | National basic fee paid | 07.02.2007 | Search fee paid | 07.02.2007 | Designation fee(s) paid | 07.02.2007 | Examination fee paid | Examination procedure | 07.02.2007 | Examination requested [2007/21] | 04.09.2007 | Loss of particular rights, legal effect: designated state(s) | 12.10.2007 | Despatch of communication of loss of particular rights: designated state(s) AT, BE, BG, CH, CY, CZ, DK, EE, ES, FI, FR, GB, GR, HU, IE, IS, IT, LT, LU, MC, PL, PT, RO, SE, SI, SK, TR | 27.11.2008 | Application deemed to be withdrawn, date of legal effect [2009/25] | 13.01.2009 | Despatch of communication that the application is deemed to be withdrawn, reason: reply to the communication from the examining division not received in time [2009/25] | Fees paid | Renewal fee | 23.06.2007 | Renewal fee patent year 03 | 27.06.2008 | Renewal fee patent year 04 |
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Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [X]GB1532146 (CALIFORNIA LINEAR CIRCUITS INC) [X] 1-23 * page 2, column 1, line 57 - line 64 * * page 2, column 2, line 87 - line 93 *; | [A]US4999309 (BUYNOSKI MATTHEW S [US]) [A] 1-23 * column 4 - column 5; figure - *; | [X]EP0513639 (IBM [US]) [X] 1-23 * column 6, line 10 - line 15 *; | [X]EP0707346 (ADVANCED MICRO DEVICES INC [US]) [X] 7,8 * column 5, line 14 - line 38 *; | [X]US6660608 (BUYNOSKI MATTHEW [US]) [X] 1-23 * column 1, line 31 - line 50 *; | [Y] - SZE S.M., Physics of Semiconductor Devices, US NEW YORK, WILEY & SONS, (1981), XP002489660 [Y] 1-23 * page 21; figure 13 * | [Y] - WOLF S., Silicon Processing for VLSI Era: Process Technology, US, SUNSET BEACH, LATTICE PRESS, (1986), ISBN 0 096 16723 7, XP002489661 [Y] 1-23 * page 280 - page 308 * | [A] - GALVAGNO G; SCANDURRA A; RAINERI V; RIMINI E; LA FERLA A; SCIASCIA V; FRISINA F; RASPAGLIESI M; FERLA G, "Implants of aluminum into silicon", NUCLEAR INSTRUMENTS & METHODS IN PHYSICS RESEARCH, SECTION B (BEAM INTERACTIONS WITH MATERIALS AND ATOMS), ELSEVIER SCIENCE PUBLISHERS, (199304), pages 105 - 108, XP002489659 [A] 1-23 * page 105 - page 108; figure - * DOI: http://dx.doi.org/10.1016/0168-583X(93)95023-X | [A] - AMEMIYA KENSUKE ET AL, "High energy aluminum ion implantation using a variable energy radio frequency quadrupole implanter", JOURNAL OF VACUUM SCIENCE AND TECHNOLOGY: PART A, AVS /AIP, MELVILLE, NY, US, (19980301), vol. 16, no. 2, ISSN 0734-2101, pages 472 - 476, XP012003808 [A] 1-23 * page 472 - page 476; figure - * DOI: http://dx.doi.org/10.1116/1.581045 | [A] - LIN C-M ET AL, "SI P+-N SHALLOW JUNCTION FABRICATION USING ON-AXIS GA+ IMPLANTATION", APPLIED PHYSICS LETTERS, AIP, AMERICAN INSTITUTE OF PHYSICS, MELVILLE, NY, (19880613), vol. 52, no. 24, ISSN 0003-6951, pages 2049 - 2051, XP000020281 [A] 7,8,10-12 * page 2049 - page 2051 * DOI: http://dx.doi.org/10.1063/1.99577 | [A] - PARRY C P ET AL, "Structural and electrical properties of p+n junctions in Si by low energy Ga+ implantation", JOURNAL OF APPLIED PHYSICS, AMERICAN INSTITUTE OF PHYSICS. NEW YORK, US, (19971115), vol. 82, no. 10, ISSN 0021-8979, pages 4990 - 4993, XP012042835 [A] 7,8,10-12 * page 4990 - page 4993 * DOI: http://dx.doi.org/10.1063/1.366367 | [A] - LIN C-M ET AL, "SUB-100-NM P+-N SHALLOW JUNCTIONS FABRICATED BY GROUP III DUAL ION IMPLANTATION AND RAPID THERMAL ANNEALING", APPLIED PHYSICS LETTERS, AIP, AMERICAN INSTITUTE OF PHYSICS, MELVILLE, NY, (19890501), vol. 54, no. 18, ISSN 0003-6951, pages 1790 - 1792, XP000032208 [A] 7,8,10-12 * page 1790 - page 1792 * DOI: http://dx.doi.org/10.1063/1.101491 | [A] - LIN C-M ET AL, "FABRICATION OF SUB-MICROMETER PMOSFETS WITH SUB-100 NM P+-N SHALLOWJUNCTIONS USING GROUP III DUAL ION IMPLANTATION", SOLID STATE ELECTRONICS, ELSEVIER SCIENCE PUBLISHERS, BARKING, GB, (19900401), vol. 33, no. 4, ISSN 0038-1101, pages 472 - 474, XP000127140 [A] 7,8,10-12 * page 472 - page 474; figure - * DOI: http://dx.doi.org/10.1016/0038-1101(90)90054-I | International search | [X] - KRAUSE O. ET AL., "Determination of Aluminum diffusion parameter in silicon", JAP, (200205), vol. 91, no. 9, pages 5645 - 5649, XP012056321 DOI: http://dx.doi.org/10.1063/1.1465501 |