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Extract from the Register of European Patents

EP About this file: EP1657633

EP1657633 - Routing and forwarding table management for network processor architectures [Right-click to bookmark this link]
StatusNo opposition filed within time limit
Status updated on  08.05.2009
Database last updated on 25.09.2024
Most recent event   Tooltip10.12.2010Lapse of the patent in a contracting state
New state(s): GR
published on 12.01.2011  [2011/02]
Applicant(s)For all designated states
RadiSys Corporation
5445 N.E. Dawson Creek Drive
Hillsboro OR 97124 / US
[2006/24]
Former [2006/20]For all designated states
Radisys Microware Communications Software Division, Inc.
1500 NW 118th Street
Des Moines, IA 50325 / US
Inventor(s)01 / Schwaderer, Curt
4738 92nd Court
Urvindale Iowa 50322 / US
02 / Lyons, David
1240 Office Plaza Drive
West Des Moines, Iowa 50266 / US
03 / Stoen, Rick
1240 Office Plaza Drive
West Des Moines, Iowa 50266 / US
 [2008/09]
Former [2006/37]01 / Schwaderer, Curt
4738 92nd Court
Urvindale Iowa 50266 / US
02 / Lyons, David
1240 Office Plaza Drive
West Des Moines, Iowa 50266 / US
03 / Stoen, Rick
1240 Office Plaza Drive
West Des Moines, Iowa 50266 / US
Former [2006/20]01 / Schwaderer, Curt
1500 NW 118th Street
Des Moines IA 50325 / US
02 / Lyons, David
1550 NW 118th Street
Des Moines IA 50325 / US
03 / Stoen, Rick
1550 NW 118th Street
Des Moines IA 50325 / US
Representative(s)Hofstetter, Schurack & Partner
Patent- und Rechtsanwaltskanzlei
PartG mbB
Balanstrasse 57
81541 München / DE
[N/P]
Former [2006/20]Patentanwälte Hofstetter, Schurack & Skora
Balanstrasse 57
81541 München / DE
Application number, filing date06000066.809.11.2002
[2006/20]
Priority number, dateUS2001004568109.11.2001         Original published format: US 45681
[2006/20]
Filing languageEN
Procedural languageEN
PublicationType: A1 Application with search report 
No.:EP1657633
Date:17.05.2006
Language:EN
[2006/20]
Type: B1 Patent specification 
No.:EP1657633
Date:02.07.2008
Language:EN
[2008/27]
Search report(s)(Supplementary) European search report - dispatched on:EP28.03.2006
ClassificationIPC:G06F9/38, H04L12/56
[2008/02]
CPC:
H04L45/48 (EP,US); H04L45/00 (US); H04L45/54 (EP,US);
H04L49/309 (EP,US); H04L45/76 (EP)
Former IPC [2006/20]G06F9/38
Designated contracting statesAT,   BE,   BG,   CH,   CY,   CZ,   DE,   DK,   EE,   ES,   FI,   FR,   GB,   GR,   IE,   IT,   LI,   LU,   MC,   NL,   PT,   SE,   SK,   TR [2007/04]
Former [2006/20]AT,  BE,  BG,  CH,  CY,  CZ,  DE,  DK,  EE,  ES,  FI,  FR,  GB,  GR,  HU,  IE,  IS,  IT,  LI,  LT,  LU,  LV,  MC,  NL,  PL,  PT,  RO,  SE,  SI,  SK,  TR 
TitleGerman:Verwaltung von Routing- und Weiterleitungstabellen für Netzwerkprozessorarchitekturen[2006/20]
English:Routing and forwarding table management for network processor architectures[2006/20]
French:Gestion d'une table d'acheminement et de réacheminement pour des architectures de processeur de réseau[2006/20]
Examination procedure28.09.2006Amendment by applicant (claims and/or description)
28.09.2006Examination requested  [2006/45]
22.03.2007Despatch of a communication from the examining division (Time limit: M04)
18.07.2007Reply to a communication from the examining division
01.02.2008Communication of intention to grant the patent
19.05.2008Fee for grant paid
19.05.2008Fee for publishing/printing paid
Parent application(s)   TooltipEP02782277.4  / EP1454243
Opposition(s)03.04.2009No opposition filed within time limit [2009/24]
Fees paidRenewal fee
03.01.2006Renewal fee patent year 03
03.01.2006Renewal fee patent year 04
13.11.2006Renewal fee patent year 05
16.11.2007Renewal fee patent year 06
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Patent Court
See the Register of the Unified Patent Court for opt-out data
Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court.
Lapses during opposition  TooltipCY02.07.2008
CZ02.07.2008
EE02.07.2008
SK02.07.2008
TR02.07.2008
BG02.10.2008
GR03.10.2008
LU09.11.2008
MC30.11.2008
PT02.12.2008
[2011/02]
Former [2010/40]CY02.07.2008
CZ02.07.2008
EE02.07.2008
SK02.07.2008
TR02.07.2008
BG02.10.2008
LU09.11.2008
MC30.11.2008
PT02.12.2008
Former [2010/33]CZ02.07.2008
EE02.07.2008
SK02.07.2008
BG02.10.2008
LU09.11.2008
MC30.11.2008
PT02.12.2008
Former [2009/29]CZ02.07.2008
EE02.07.2008
SK02.07.2008
BG02.10.2008
MC30.11.2008
PT02.12.2008
Former [2009/28]CZ02.07.2008
EE02.07.2008
SK02.07.2008
BG02.10.2008
PT02.12.2008
Former [2009/22]EE02.07.2008
BG02.10.2008
PT02.12.2008
Former [2009/17]BG02.10.2008
PT02.12.2008
Documents cited:Search[X]US5815501  (GADDIS MICHAEL E [US], et al) [X] 1,2,5,8,9 * column 5, line 11 - line 29; figure 3 * * column 5, line 48 - column 6, line 17 * * column 9, line 9 - line 18; figure 8 * * column 10, line 1 - line 37; figure 9 * * column 13, line 1 - line 4 *;
 [XA]  - INTEL, "INTEL IXP1200 NETWORK Processor Family Hardware Reference Manual", (20010810), pages 1 - 272, URL: http://www.ixpintel.nntu.nnov.ru/dokym_rykov/proc_ixp1200/pdf/IXP1200%20HW%20Ref%20Manual.pdf, (20060307), XP002370938 [X] 1,3-9,12 * page 18, line 1, paragraph 2.2 - page 19, line 11; figure 2.1 * * page 19, line 1, paragraph 2.3 - page 20, line 5 * * page 27, line 1 - line 5; figure 2.6 * * page 36, line 15 - line 16; table 2.2 * * page 101, line 1, paragraph 4.11 - line 10 * * page 134, line 14, paragraph 5.2.3.2 - line 18 * * page 260, paragraph 8.8.1 - page 262, paragraph 8.8.1; figures 8.9-8.12 * * page 262, line 1 - line 2 * [A] 10,11
 [XA]  - INTEL, "Intel WAN/LAN Access Switch Example Design for the Intel IXP1200 Network Processor", (200105), pages 1 - 20, URL: ftp://download.intel.com/design/network/applnots/27352801.pdf, (20060303), XP007900110 [X] 1,3,8,9,12 * page 6, paragraph 2.0 * * page 10; table 1 * * page 11, paragraph 2.2.1.5 - paragraph 2.2.1.6 * * page 11, line 12, paragraph 2.2.2.1 - line 15, paragraph 2.2.2.1 * * page 15; figure 4 * [A] 4
The EPO accepts no responsibility for the accuracy of data originating from other authorities; in particular, it does not guarantee that it is complete, up to date or fit for specific purposes.