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EP2026352
European procedure
Extract from the Register of European Patents
EP About this file: EP2026352
| EP2026352 - Common modules for DDRII SDRAM and DDRIII SDRAM [Right-click to bookmark this link] | Status | No opposition filed within time limit Status updated on 06.08.2010 Database last updated on 01.01.2025 | Most recent event Tooltip | 06.08.2010 | No opposition filed within time limit | published on 08.09.2010 [2010/36] | Applicant(s) | For all designated states Giga-Byte Technology Co., Ltd. No. 6, Bau Chiang Road Hsin-Tien Taipei-Hsien 231 / TW | [N/P] |
| Former [2009/08] | For all designated states Giga-Byte Technology Co., Ltd. No. 6, Bau Chiang Road Hsin-Tien Taipei-Hsien 231 / TW | Inventor(s) | 01 /
Chen, Chin-Hui No. 6, Bau Chiang Road, Hsin-Tien 231Taipei Hsien / TW | 02 /
Lin, Hou-Yuan No. 6, Bau Chiang Road, Hsin-Tien 231 Taipei Hsien / TW | [2009/08] | Representative(s) | Charrier Rapp & Liebau Patentanwälte PartG mbB Fuggerstraße 20 86150 Augsburg / DE | [N/P] |
| Former [2009/08] | Charrier, Rapp & Liebau Patentanwälte Postfach 31 02 60 86063 Augsburg / DE | Application number, filing date | 07112695.7 | 18.07.2007 | [2009/08] | Filing language | EN | Procedural language | EN | Publication | Type: | A1 Application with search report | No.: | EP2026352 | Date: | 18.02.2009 | Language: | EN | [2009/08] | Type: | B1 Patent specification | No.: | EP2026352 | Date: | 30.09.2009 | Language: | EN | [2009/40] | Search report(s) | (Supplementary) European search report - dispatched on: | EP | 09.04.2008 | Classification | IPC: | G11C5/06, G11C11/4063 | [2009/08] | CPC: |
G11C5/06 (EP);
G11C5/04 (EP);
G11C7/1066 (EP);
H05K1/0246 (EP);
H05K1/14 (EP);
H05K2201/10022 (EP);
H05K2201/10159 (EP)
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| Designated contracting states | DE, FR, GB [2009/40] |
| Former [2009/08] | AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HU, IE, IS, IT, LI, LT, LU, LV, MC, MT, NL, PL, PT, RO, SE, SI, SK, TR | Title | German: | Gemeinsame Module für DDRII-SDRAM und DDRIII-SDRAM | [2009/08] | English: | Common modules for DDRII SDRAM and DDRIII SDRAM | [2009/08] | French: | Modules communs pour DDRII SDRAM et DDRIII SDRAM | [2009/08] | Examination procedure | 12.09.2008 | Amendment by applicant (claims and/or description) | 12.09.2008 | Examination requested [2009/08] | 07.10.2008 | Despatch of a communication from the examining division (Time limit: M04) | 04.02.2009 | Reply to a communication from the examining division | 15.05.2009 | Communication of intention to grant the patent | 20.08.2009 | Fee for grant paid | 20.08.2009 | Fee for publishing/printing paid | Opposition(s) | 01.07.2010 | No opposition filed within time limit [2010/36] | Fees paid | Renewal fee | 24.07.2009 | Renewal fee patent year 03 |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Documents cited: | Search | [X]US6466472 (LIN JOHNSON [TW]) [X] 1-16 * abstract * * figure 1 * * paragraphs [0015] - [0022] *; | [A]US2006077731 (WARE FREDERICK A [US], et al) [A] 1-16 * abstract * * figure 1 * * paragraphs [0058] - [0062] *; | [A]US2006262587 (MATSUI YOSHINORI [JP], et al) [A] 1-16 * abstract * * figure 39 ** paragraphs [0035] - [0039] * | by applicant | US6466472 |