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Extract from the Register of European Patents

EP About this file: EP1821539

EP1821539 - Decoding apparatus and integrated circuit [Right-click to bookmark this link]
StatusThe application has been withdrawn
Status updated on  14.08.2009
Database last updated on 03.10.2024
Most recent event   Tooltip14.08.2009Withdrawal of applicationpublished on 16.09.2009  [2009/38]
Applicant(s)For all designated states
Panasonic Corporation
1006, Oaza Kadoma
Kadoma-shi
Osaka 571-8501 / JP
[N/P]
Former [2008/47]For all designated states
Panasonic Corporation
1006, Oaza Kadoma Kadoma-shi
Osaka 571-8501 / JP
Former [2007/34]For all designated states
MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
1006, Oaza Kadoma, Kadoma-shi
Osaka 571-8501 / JP
Inventor(s)01 / Watanabe, T. Matsushita Electric Ind. Co, Ltd.
IP Dev.Ctr. 19F Matsushita IMP Bldg. 1-3-7 Shiromi
Chuo-ku Osaka 540-6319 / JP
02 / Kitamura, A., Matsushita Electric Ind. Co, Ltd.
IP Dev.Ctr. 19F Matsushita IMP Bldg. 1-3-7 Shiromi
Chuo-ku Osaka 540-6319 / JP
 [2007/34]
Representative(s)Crawford, Andrew Birkby, et al
A.A. Thornton & Co. 235 High Holborn
London WC1V 7LE / GB
[N/P]
Former [2007/34]Crawford, Andrew Birkby, et al
A.A. Thornton & Co., 235 High Holborn
London WC1V 7LE / GB
Application number, filing date07250600.914.02.2007
[2007/34]
Priority number, dateJP2006003847015.02.2006         Original published format: JP 2006038470
[2007/34]
Filing languageEN
Procedural languageEN
PublicationType: A2 Application without search report 
No.:EP1821539
Date:22.08.2007
Language:EN
[2007/34]
Type: A3 Search report 
No.:EP1821539
Date:05.08.2009
[2009/32]
Search report(s)(Supplementary) European search report - dispatched on:EP06.07.2009
ClassificationIPC:H04N7/167, G06F9/445
[2009/32]
CPC:
H04N7/1675 (EP,US); H04N21/4432 (EP,US); H04N21/4623 (EP,US);
H04N21/818 (EP,US)
Former IPC [2007/34]H04N7/167
Designated contracting statesAT,   BE,   BG,   CH,   CY,   CZ,   DE,   DK,   EE,   ES,   FI,   FR,   GB,   GR,   HU,   IE,   IS,   IT,   LI,   LT,   LU,   LV,   MC,   NL,   PL,   PT,   RO,   SE,   SI,   SK,   TR [2007/34]
Extension statesALNot yet paid
BANot yet paid
HRNot yet paid
MKNot yet paid
RSNot yet paid
TitleGerman:Dekodierungsvorrichtung und integrierte Schaltungsanordnung[2007/34]
English:Decoding apparatus and integrated circuit[2007/34]
French:Appareil de décodage et circuit intégré[2007/34]
Examination procedure07.08.2009Application withdrawn by applicant  [2009/38]
Fees paidRenewal fee
13.02.2009Renewal fee patent year 03
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Documents cited:Search[A]US2005251689  (LEE WEN-CHIEH [TW], et al) [A] 1-10 * paragraphs [0034] , [0035] *;
 [A]WO2004012060  (O2MICRO INC [US], et al) [A] 1-10 * pages 32-35 *;
 [A]US2005168638  (IWATA TAKESHI [JP]) [A] 1-10 * paragraph [0019] *;
 [A]US6763458  (WATANABE RYOJI [US], et al) [A] 1-10 * columns 5-6 *;
 [A]US2005160474  (OBITSU TOSHIRO [JP], et al) [A] 1-10 * the whole document *;
 [A]JP2005011336  (MATSUSHITA ELECTRIC IND CO LTD) [A] 1-10 * abstract *
The EPO accepts no responsibility for the accuracy of data originating from other authorities; in particular, it does not guarantee that it is complete, up to date or fit for specific purposes.