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EP2005584
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EP About this file: EP2005584
| EP2005584 - A SCHEME TO ALLEVIATE SIGNAL DEGRADATION CAUSED BY DIGITAL GAIN CONTROL LOOPS [Right-click to bookmark this link] | Status | The application has been withdrawn Status updated on 15.01.2010 Database last updated on 18.11.2024 | Most recent event Tooltip | 15.01.2010 | Withdrawal of application | published on 17.02.2010 [2010/07] | Applicant(s) | For all designated states Panasonic Corporation 1006, Oaza Kadoma Kadoma-shi Osaka 571-8501 / JP | [N/P] |
| Former [2008/52] | For all designated states Panasonic Corporation 1006, Oaza Kadoma Kadoma-shi Osaka 571-8501 / JP | Inventor(s) | 01 /
LOMAS, David 10 Ebor Close Swindon, Wiltshire SN25 2FQ / GB | 02 /
AHLES, Stephan 3 Gooch Close Twyford, Berkshire, RG10 0XS / BG | [2008/52] | Representative(s) | Jennings, Michael John, et al AA Thornton IP LLP 8th Floor, 125 Old Broad Street London EC2N 1AR / GB | [N/P] |
| Former [2008/52] | Jennings, Michael John, et al A.A. Thornton & Co. 235 High Holborn London, WC1V 7LE / GB | Application number, filing date | 07732003.4 | 12.03.2007 | [2008/52] | WO2007GB00856 | Priority number, date | GB20060005053 | 13.03.2006 Original published format: GB 0605053 | [2008/52] | Filing language | EN | Procedural language | EN | Publication | Type: | A1 Application with search report | No.: | WO2007104957 | Date: | 20.09.2007 | Language: | EN | [2007/38] | Type: | A1 Application with search report | No.: | EP2005584 | Date: | 24.12.2008 | Language: | EN | The application published by WIPO in one of the EPO official languages on 20.09.2007 takes the place of the publication of the European patent application. | [2008/52] | Search report(s) | International search report - published on: | EP | 20.09.2007 | Classification | IPC: | H03G3/30 | [2008/52] | CPC: |
H03G3/3089 (EP,US);
H03G3/3026 (GB)
| Designated contracting states | AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HU, IE, IS, IT, LI, LT, LU, LV, MC, MT, NL, PL, PT, RO, SE, SI, SK, TR [2008/52] | Extension states | AL | Not yet paid | BA | Not yet paid | HR | Not yet paid | MK | Not yet paid | RS | Not yet paid | Title | German: | SCHEMA ZUR VERRINGERUNG DER DURCH DIGITALE VERSTÄRKUNGSREGELSCHLEIFEN VERURSACHTEN SIGNALVERSCHLECHTERUNG | [2008/52] | English: | A SCHEME TO ALLEVIATE SIGNAL DEGRADATION CAUSED BY DIGITAL GAIN CONTROL LOOPS | [2008/52] | French: | SCHEMA POUR ATTENUER LA DEGRADATION D'UN SIGNAL DUE A DES BOUCLES DE REGULATION NUMERIQUE DE GAIN | [2008/52] | Entry into regional phase | 30.09.2008 | National basic fee paid | 30.09.2008 | Designation fee(s) paid | 30.09.2008 | Examination fee paid | Examination procedure | 07.10.2008 | Examination requested [2008/52] | 07.01.2010 | Application withdrawn by applicant [2010/07] | Fees paid | Renewal fee | 13.03.2009 | Renewal fee patent year 03 |
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| Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court. | Cited in | International search | [A]WO9008447 (SUPERIOR ELECTRONIC DEV PTY LT [AU]); | [A]US5966258 (BLISS WILLIAM G [US]); | [A]JP2000081969 (KUROSAWA KAORU, et al); | [X]JP2002237735 (DENSO CORP); |