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Extract from the Register of European Patents

EP About this file: EP2229640

EP2229640 - A METHOD OF PROGRESSIVELY PROTOTYPING AND VALIDATING A CUSTOMERS ELECTRONIC SYSTEM DESIGN [Right-click to bookmark this link]
StatusThe application is deemed to be withdrawn
Status updated on  19.10.2012
Database last updated on 05.10.2024
Most recent event   Tooltip19.10.2012Application deemed to be withdrawnpublished on 21.11.2012  [2012/47]
Applicant(s)For all designated states
Inpa Systems, Inc.
22 Great Oaks Blvd., Suite 280
San Jose, CA 95119 / US
[2010/38]
Inventor(s)01 / HUANG, Thomas, B.
3526 Pinnacle Court
San Jose California 95132 / US
02 / CHANG, Chioumin, M.
7188 Bridge Court
San Jose California 95120 / US
 [2010/38]
Representative(s)Freeman, Jacqueline Carol
WP Thompson
138 Fetter Lane
London EC4A 1BT / GB
[N/P]
Former [2010/38]Freeman, Jacqueline Carol
W.P.Thompson & Co. 55 Drury Lane
London WC2B 5SQ / GB
Application number, filing date08859894.110.11.2008
[2010/38]
WO2008US83003
Priority number, dateUS2007095336610.12.2007         Original published format: US 953366
[2010/38]
Filing languageEN
Procedural languageEN
PublicationType: A1 Application with search report
No.:WO2009075979
Date:18.06.2009
Language:EN
[2009/25]
Type: A1 Application with search report 
No.:EP2229640
Date:22.09.2010
Language:EN
The application published by WIPO in one of the EPO official languages on 18.06.2009 takes the place of the publication of the European patent application.
[2010/38]
Search report(s)International search report - published on:EP18.06.2009
ClassificationIPC:G06F17/50
[2010/38]
CPC:
G06F30/331 (EP,US); G06F2117/08 (EP,US)
Designated contracting statesAT,   BE,   BG,   CH,   CY,   CZ,   DE,   DK,   EE,   ES,   FI,   FR,   GB,   GR,   HR,   HU,   IE,   IS,   IT,   LI,   LT,   LU,   LV,   MC,   MT,   NL,   NO,   PL,   PT,   RO,   SE,   SI,   SK,   TR [2010/38]
TitleGerman:VERFAHREN ZUM PROGRESSIVEN PROTOTYPING UND VALIDIEREN EINES ELEKTRONIKSYSTEMDESIGNS EINES KUNDEN[2010/38]
English:A METHOD OF PROGRESSIVELY PROTOTYPING AND VALIDATING A CUSTOMERS ELECTRONIC SYSTEM DESIGN[2010/38]
French:PROCÉDÉ DE PROTOTYPAGE ET DE VALIDATION PROGRESSIFS D'UNE CONCEPTION DE SYSTÈME ÉLECTRONIQUE DE CLIENTS[2010/38]
Entry into regional phase02.07.2010National basic fee paid 
02.07.2010Designation fee(s) paid 
02.07.2010Examination fee paid 
Examination procedure02.07.2010Examination requested  [2010/38]
27.08.2010Amendment by applicant (claims and/or description)
01.06.2012Application deemed to be withdrawn, date of legal effect  [2012/47]
05.07.2012Despatch of communication that the application is deemed to be withdrawn, reason: renewal fee not paid in time  [2012/47]
Fees paidRenewal fee
24.11.2010Renewal fee patent year 03
Penalty fee
Additional fee for renewal fee
30.11.201104   M06   Not yet paid
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Cited inInternational search[DI]US6389379  (LIN SHARON SHEAU-PYNG [US], et al) [DI] 1-19 * abstract * * column 8 - column 13 *;
 [DA]US6701491  (YANG SEI-YANG [KR]) [DA] 1-19 * abstract ** column 1 - column 4 *;
 [I]  - NAMSEUNG KIM ET AL, "Virtual chip: making functional models work on real target systems", DESIGN AUTOMATION CONFERENCE, 1998. PROCEEDINGS SAN FRANCISCO, CA, USA 15-19 JUNE 1998, NEW YORK, NY, USA,IEEE, US, (19980615), ISBN 978-0-89791-964-7, pages 170 - 173, XP010309233 [I] 1-19 * the whole document *

DOI:   http://dx.doi.org/10.1109/DAC.1998.724460
 [I]  - LEE S ET AL, "Interface synthesis between software chip model and target board", JOURNAL OF SYSTEMS ARCHITECTURE, ELSEVIER SCIENCE PUBLISHERS BV., AMSTERDAM, NL, (20020901), vol. 48, no. 1-3, ISSN 1383-7621, pages 49 - 57, XP004378850 [I] 1-19 * the whole document *

DOI:   http://dx.doi.org/10.1016/S1383-7621(02)00065-6
The EPO accepts no responsibility for the accuracy of data originating from other authorities; in particular, it does not guarantee that it is complete, up to date or fit for specific purposes.