Deutsch English Français

Contact

EP2159918

European procedure

Quick help

Maintenance news

Scheduled maintenance

Regular maintenance outages:
between 05.00 and 05.15 hrs CET (Monday to Sunday).

Other outages
Availability

2022.02.11

More...

News flashes

Italy joins the Federated Register

Click here for more information on the Federated Register.

2025-06-12

More...

Extract from the Register of European Patents

EP About this file: EP2159918

EP2159918 - D/A converter circuit and digital input class-D amplifier [Right-click to bookmark this link]
Status	The application is deemed to be withdrawn Status updated on 19.04.2013 Database last updated on 30.03.2026
Most recent event Tooltip	19.04.2013	Application deemed to be withdrawn	published on 22.05.2013 [2013/21]
Applicant(s)	For all designated states Yamaha Corporation 10-1, Nakazawa-cho Naka-ku Hamamatsu-shi, Shizuoka 430-8650 / JP
	[2010/09]
Inventor(s)	01 / Kawai, Hirotaka c/o Yamaha Corporation 10-1, Nakazawa-cho Naka-ku, Hamamatsu-shi Shizuoka-ken 430-8650 / JP
	02 / Tsuji, Nobuaki c/o Yamaha Corporation 10-1, Nakazawa-cho Naka-ku, Hamamatsu-shi Shizuoka-ken 430-8650 / JP
	03 / Morishima, Morito c/o Yamaha Corporation 10-1, Nakazawa-cho Naka-ku, Hamamatsu-shi Shizuoka-ken 430-8650 / JP
	04 / Otani, Yohei c/o Yamaha Corporation 10-1, Nakazawa-cho Naka-ku, Hamamatsu-shi Shizuoka-ken 430-8650 / JP
	[2010/09]
Representative(s)	Emde, Eric Wagner & Geyer Partnerschaft mbB Patent- und Rechtsanwälte Gewürzmühlstrasse 5 80538 München / DE
	[N/P]
Former [2010/09]	Emde, Eric Wagner & Geyer Gewürzmühlstrasse 5 80538 München / DE
Application number, filing date	09010822.6	24.08.2009
	[2010/09]
Priority number, date	JP20080220127	28.08.2008 Original published format: JP 2008220127
	[2010/09]
Filing language	EN
Procedural language	EN
Publication	Type:	A2 Application without search report
	No.:	EP2159918
	Date:	03.03.2010
	Language:	EN
	[2010/09]
	Type:	A3 Search report
	No.:	EP2159918
	Date:	25.04.2012
	Language:	EN
	[2012/17]
Search report(s)	(Supplementary) European search report - dispatched on:	EP	28.03.2012
Classification	IPC:	H03M1/06, H03M3/04, // H03M1/82, G06F1/025, H03F3/217, H03M7/00	[2012/17]
	CPC:	H03F3/2173 (EP,US); H03M1/0639 (EP,US); H03M1/0673 (EP,US); H03M3/328 (EP,US); H03M1/822 (EP,US); H03M3/50 (EP,US); (+) H03M3/506 (EP,US); H03M7/3026 (EP,US) (-)
	Former IPC [2010/09]	H03M1/06, H03M3/02, H03M7/00, H03M1/82, G06F1/025, H03F3/217, // H03M1/82, G06F1/025, H03F3/217
Designated contracting states	AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LI, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, SE, SI, SK, SM, TR [2010/09]
Extension states	AL	Not yet paid
	BA	Not yet paid
	RS	Not yet paid
Title	German:	D/A-Wandlerschaltung und Verstärker mit digitaler Eingabe der Klasse D	[2010/09]
	English:	D/A converter circuit and digital input class-D amplifier	[2010/09]
	French:	Circuit convertisseur N/A et amplification d'entrées numériques de classe D	[2010/09]
Examination procedure	26.10.2012	Application deemed to be withdrawn, date of legal effect [2013/21]
	05.12.2012	Despatch of communication that the application is deemed to be withdrawn, reason: examination fee not paid in time [2013/21]
Fees paid	Renewal fee
	30.08.2011	Renewal fee patent year 03
	Penalty fee
	Additional fee for renewal fee
	31.08.2012	04 M06 Not yet paid
Opt-out from the exclusive Tooltip competence of the Unified Patent Court	See the Register of the Unified Patent Court for opt-out data
	Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court.
Documents cited:	Search	[I] EP0430449 (HEWLETT PACKARD CO et al.) [I] 1,2 * abstract *
		[AD] US2006255992 (SAKIYAMA RYOJI et al.) [AD] 1-7 * abstract *
		[XI] JARED WELZ ET AL: "Necessary and Sufficient Conditions for Mismatch Shaping in a General Class of Multibit DACs", IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II: ANALOG AND DIGITALSIGNAL PROCESSING/ISSN 1057-7130>VN 8090B, INSTITUTE OF ELECTRICAL AND ELECTRONICS ENGINEERS INC, 345 EAST 47 STREET, NEW YORK, N.Y. 10017, USA, vol. 49, no. 12, 1 December 2002 (2002-12-01), XP011071639, ISSN: 1057-7130 [X] 1 * page 757; figure 7 *[I] 2-7
		[A] BAIRD R T ET AL: "LINEARITY ENHANCEMENT OF MULTIBIT DELTA SIGMA A/D AND CONVERTERS USING DATA WIGHTED AVERAGING", IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II: ANALOG AND DIGITALSIGNAL PROCESSING/ISSN 1057-7130>VN 8090B, INSTITUTE OF ELECTRICAL AND ELECTRONICS ENGINEERS INC, 345 EAST 47 STREET, NEW YORK, N.Y. 10017, USA, vol. 42, no. 12, 1 December 1995 (1995-12-01), pages 753 - 762, XP000553740, ISSN: 1057-7130, DOI: 10.1109/82.476173 [A] 1-7 * pages 760-761; figures 18, 19 * DOI: http://dx.doi.org/10.1109/82.476173

The EPO accepts no responsibility for the accuracy of data originating from other authorities; in particular, it does not guarantee that it is complete, up to date or fit for specific purposes.