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Extract from the Register of European Patents

EP About this file: EP2295619

EP2295619 - Process for producing Low Defect Density Silicon Having a Vacancy-Dominated Core Substantially Free of Oxidation Induced Stacking Faults [Right-click to bookmark this link]
Former [2011/11]Low Defect Density Silicon Having A Vacancy-Dominated Core Substantially Free of Oxidation Induced Stacking Faults
[2013/30]
StatusNo opposition filed within time limit
Status updated on  27.02.2015
Database last updated on 25.09.2024
Most recent event   Tooltip23.10.2015Lapse of the patent in a contracting state
New state(s): GB
published on 25.11.2015  [2015/48]
Applicant(s)For all designated states
MEMC Electronic Materials, Inc.
501 Pearl Drive, P.O. Box 8 St. Peters
Missouri 63376 / US
[2014/17]
Former [2011/11]For all designated states
MEMC Electronic Materials, Inc.
501 Pearl Drive, P.O. Box 8 St. Peters
Missouri 63376 / US
Inventor(s)01 / Kim, Chang Bum
C/o MEMC Electronic Materials, Inc.
501 Pearl Drive, P.O.Box 8
St. Peters, MO 63376 / US
02 / Kimbel, Steven L
C/o MEMC Electronic Materials, Inc.
501 Pearl Drive, P.O.Box 8
St. Peters, MO 63376 / US
03 / Libbert, Jeffrey L
C/o MEMC Electronic Materials, Inc.
501 Pearl Drive, P.O.Box 8
St. Peters, MO 63376 / US
04 / Banan, Mohsen
C/o MEMC
501 Pearl Drive P.O. Box 8
St. Peters, 63376 / US
 [2014/17]
Former [2011/11]01 / Kim, Chang Bum
C/o MEMC Electronic Materials, Inc. 501 Pearl Drive, P.O.Box 8
St. Peters, MO 63376 / US
02 / Kimbel, Steven L
C/o MEMC Electronic Materials, Inc. 501 Pearl Drive, P.O.Box 8
St. Peters, MO 63376 / US
03 / Libbert, Jeffrey L
C/o MEMC Electronic Materials, Inc. 501 Pearl Drive, P.O.Box 8
St. Peters, MO 63376 / US
04 / Banan, Mohsen
C/o MEMC 501 Pearl Drive P.O. Box 8
St. Peters, 63376 / US
Representative(s)Parchmann, Stefanie, et al
Maiwald GmbH
Elisenhof
Elisenstraße 3
80335 München / DE
[N/P]
Former [2013/23]Parchmann, Stefanie, et al
Maiwald Patentanwalts GmbH
Elisenhof
Elisenstraße 3
80335 München / DE
Former [2011/11]Smaggasgale, Gillian Helen
W.P. Thompson & Co 55 Drury Lane
London WC2B 5SQ / GB
Application number, filing date10177865.222.01.2002
[2011/11]
Priority number, dateUS20010264415P26.01.2001         Original published format: US 264415 P
[2011/11]
Filing languageEN
Procedural languageEN
PublicationType: A1 Application with search report 
No.:EP2295619
Date:16.03.2011
Language:EN
[2011/11]
Type: B1 Patent specification 
No.:EP2295619
Date:23.04.2014
Language:EN
[2014/17]
Search report(s)(Supplementary) European search report - dispatched on:EP10.11.2010
ClassificationIPC:C30B29/06, C30B15/20
[2011/11]
CPC:
C30B15/203 (EP,US); C30B15/00 (KR); C30B15/20 (EP,US);
C30B15/206 (EP,US); C30B29/06 (EP,US); Y10T428/21 (EP,US)
Designated contracting statesDE,   FR,   GB,   IT [2011/11]
TitleGerman:Verfahren zur Herstellung von Silizium mit niedriger Defektdichte und mit leerstellendominiertem Kern, der im wesentlichen frei von oxidationsinduzierten Stapelfehlern ist[2014/17]
English:Process for producing Low Defect Density Silicon Having a Vacancy-Dominated Core Substantially Free of Oxidation Induced Stacking Faults[2013/30]
French:Procédé de fabrication de silicium a faible densite de defauts dont la partie centrale dominee par des lacunes est pratiquement exempte de defauts d'empilement induits par oxydation[2013/30]
Former [2011/11]Silizium mit niedriger defektdichte und mit leerstellendominiertem Kern, das im wesentlichen frei von oxidationsinduzierten Stapelfehlern ist
Former [2011/11]Low Defect Density Silicon Having A Vacancy-Dominated Core Substantially Free of Oxidation Induced Stacking Faults
Former [2011/11]Silicium a faible densite de defauts dont la partie centrale dominee par des lacunes est pratiquement exempte de defauts d'empilement induits par oxydation
Examination procedure16.09.2011Amendment by applicant (claims and/or description)
16.09.2011Examination requested  [2011/43]
05.04.2012Despatch of a communication from the examining division (Time limit: M04)
03.08.2012Reply to a communication from the examining division
25.07.2013Communication of intention to grant the patent
14.11.2013Disapproval of the communication of intention to grant the patent by the applicant or resumption of examination proceedings by the EPO
14.11.2013Fee for grant paid
14.11.2013Fee for publishing/printing paid
20.02.2014Communication of intention to grant the patent
Parent application(s)   TooltipEP02714762.8  / EP1356139
EP06111930.1  / EP1688519
Divisional application(s)The date of the Examining Division's first communication in respect of the earliest application for which a communication has been issued (EP20020714762) is  24.01.2005
Opposition(s)26.01.2015No opposition filed within time limit [2015/14]
Fees paidRenewal fee
21.09.2010Renewal fee patent year 03
21.09.2010Renewal fee patent year 04
21.09.2010Renewal fee patent year 05
21.09.2010Renewal fee patent year 06
21.09.2010Renewal fee patent year 07
21.09.2010Renewal fee patent year 08
21.09.2010Renewal fee patent year 09
25.01.2011Renewal fee patent year 10
25.01.2012Renewal fee patent year 11
25.01.2013Renewal fee patent year 12
27.01.2014Renewal fee patent year 13
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Lapses during opposition  TooltipIT23.04.2014
GB22.01.2015
[2015/48]
Former [2015/18]IT23.04.2014
Documents cited:Search[X]WO9845508  (MEMC ELECTRONIC MATERIALS [US]) [X] 1-24 * claims 1,2,11-15 *;
 [X]JPH1143397  ;
 [A]JPH1143396
 [X]  - PATENT ABSTRACTS OF JAPAN, (19990531), vol. 1999, no. 5, & JP11043397 A 19990216 (NIPPON STEEL CORP;NITTETSU DENSHI KK) [X] 1-24 * abstract *
 [A]  - PATENT ABSTRACTS OF JAPAN, (19990531), vol. 1999, no. 5, & JP11043396 A 19990216 (NIPPON STEEL CORP;NITTETSU DENSHI KK) [A] 1-24 * abstract *
The EPO accepts no responsibility for the accuracy of data originating from other authorities; in particular, it does not guarantee that it is complete, up to date or fit for specific purposes.