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Extract from the Register of European Patents

EP About this file: EP2343808

EP2343808 - ANALOG SIGNAL SAMPLING SYSTEM AND METHOD HAVING REDUCED AVERAGE INPUT CURRENT [Right-click to bookmark this link]
Former [2011/28]Analog signal sampling system and method having reduced average input current
[2016/52]
StatusNo opposition filed within time limit
Status updated on  02.03.2018
Database last updated on 03.10.2024
FormerThe patent has been granted
Status updated on  24.03.2017
FormerGrant of patent is intended
Status updated on  29.11.2016
Most recent event   Tooltip29.05.2020Lapse of the patent in a contracting state
New state(s): PT		published on 01.07.2020  [2020/27]
Applicant(s)For all designated states
Linear Technology Corporation
1630 McCarthy Boulevard
Milpitas, CA 95035-7417 / US
[2011/37]
Former [2011/28]For all designated states
Linear Technology Corporation
1630 McCarthy Boulevard
Milpitas, CA 95035 / US
Inventor(s)01 / Oprescu, Florin A.
PO Box 8907
Rancho Santa Fe, CA 92067 / US
 [2011/28]
Representative(s)Vossius & Partner Patentanwälte Rechtsanwälte mbB
Siebertstrasse 3
81675 München / DE
[2017/17]
Former [2011/28]Vossius & Partner
Siebertstrasse 4
81675 München / DE
Application number, filing date11161019.217.10.2005
[2011/28]
Priority number, dateUS20040619007P18.10.2004         Original published format: US 619007 P
[2011/28]
Filing languageEN
Procedural languageEN
PublicationType: A2 Application without search report 
No.:EP2343808
Date:13.07.2011
Language:EN
[2011/28]
Type: A3 Search report 
No.:EP2343808
Date:20.06.2012
Language:EN
[2012/25]
Type: B1 Patent specification 
No.:EP2343808
Date:26.04.2017
Language:EN
[2017/17]
Search report(s)(Supplementary) European search report - dispatched on:EP23.05.2012
ClassificationIPC:H03M7/00, H03M1/14, H03M3/02
[2012/25]
CPC:
H03M3/322 (EP,US); H03M1/00 (KR); H03M3/43 (EP,US);
H03M3/456 (EP,US); H03M3/496 (EP,US)
Former IPC [2011/28]H03M1/00, H03M3/02
Designated contracting statesAT,   BE,   BG,   CH,   CY,   CZ,   DE,   DK,   EE,   ES,   FI,   FR,   GB,   GR,   HU,   IE,   IS,   IT,   LI,   LT,   LU,   LV,   MC,   NL,   PL,   PT,   RO,   SE,   SI,   SK,   TR [2017/17]
Former [2011/28]AT,  BE,  BG,  CH,  CY,  CZ,  DE,  DK,  EE,  ES,  FI,  FR,  GB,  GR,  HU,  IE,  IS,  IT,  LI,  LT,  LU,  LV,  MC,  NL,  PL,  PT,  RO,  SE,  SI,  SK,  TR 
TitleGerman:ANALOGSIGNAL-ABTASTSYSTEM UND -VERFAHREN MIT VERMINDERTEM MITTLEREM DIFFERENZEINGANGSSTROM[2016/50]
English:ANALOG SIGNAL SAMPLING SYSTEM AND METHOD HAVING REDUCED AVERAGE INPUT CURRENT[2016/52]
French:SYSTEME D'ECHANTILLONNAGE DE SIGNAUX ANALOGIQUES ET METHODE PRESENTANT UN COURANT D'ENTREE DIFFERENTIEL MOYEN REDUIT[2016/50]
Former [2011/28]Analogsignal-Abtastsystem und -Verfahren mit vermindertem mittlerem Differenzeingangsstrom
Former [2011/28]Analog signal sampling system and method having reduced average input current
Former [2011/28]Système d'échantillonnage de signaux analogiques et méthode présentant un courant d'entrée différentiel moyen réduit
Examination procedure05.12.2012Amendment by applicant (claims and/or description)
05.12.2012Examination requested  [2013/03]
18.01.2013Despatch of a communication from the examining division (Time limit: M04)
17.05.2013Reply to a communication from the examining division
12.09.2016Despatch of a communication from the examining division (Time limit: M02)
12.09.2016Invitation to provide information on prior art
20.09.2016Reply to a communication from the examining division
12.10.2016Reply to the invitation to provide information on prior art
30.11.2016Communication of intention to grant the patent
17.03.2017Fee for grant paid
17.03.2017Fee for publishing/printing paid
17.03.2017Receipt of the translation of the claim(s)
Parent application(s)   TooltipEP05812353.0  / EP1805898
Divisional application(s)The date of the Examining Division's first communication in respect of the earliest application for which a communication has been issued (EP20050812353) is  25.03.2009
Opposition(s)29.01.2018No opposition filed within time limit [2018/14]
Fees paidRenewal fee
03.08.2011Renewal fee patent year 03
03.08.2011Renewal fee patent year 04
03.08.2011Renewal fee patent year 05
03.08.2011Renewal fee patent year 06
25.10.2011Renewal fee patent year 07
25.10.2012Renewal fee patent year 08
28.10.2013Renewal fee patent year 09
27.10.2014Renewal fee patent year 10
27.10.2015Renewal fee patent year 11
27.10.2016Renewal fee patent year 12
Opt-out from the exclusive  Tooltip
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Responsibility for the accuracy, completeness or quality of the data displayed under the link provided lies entirely with the Unified Patent Court.
Lapses during opposition  TooltipHU17.10.2005
AT26.04.2017
CY26.04.2017
CZ26.04.2017
DK26.04.2017
EE26.04.2017
ES26.04.2017
FI26.04.2017
LT26.04.2017
LV26.04.2017
MC26.04.2017
PL26.04.2017
PT26.04.2017
RO26.04.2017
SE26.04.2017
SI26.04.2017
SK26.04.2017
TR26.04.2017
BG26.07.2017
GR27.07.2017
IS26.08.2017
IE17.10.2017
LU17.10.2017
BE31.10.2017
CH31.10.2017
LI31.10.2017
[2020/27]
Former [2020/15]HU17.10.2005
AT26.04.2017
CY26.04.2017
CZ26.04.2017
DK26.04.2017
EE26.04.2017
ES26.04.2017
FI26.04.2017
LT26.04.2017
LV26.04.2017
MC26.04.2017
PL26.04.2017
RO26.04.2017
SE26.04.2017
SI26.04.2017
SK26.04.2017
TR26.04.2017
BG26.07.2017
GR27.07.2017
IS26.08.2017
IE17.10.2017
LU17.10.2017
BE31.10.2017
CH31.10.2017
LI31.10.2017
Former [2019/46]HU17.10.2005
AT26.04.2017
CY26.04.2017
CZ26.04.2017
DK26.04.2017
EE26.04.2017
ES26.04.2017
FI26.04.2017
LT26.04.2017
LV26.04.2017
MC26.04.2017
PL26.04.2017
RO26.04.2017
SE26.04.2017
SI26.04.2017
SK26.04.2017
BG26.07.2017
GR27.07.2017
IS26.08.2017
IE17.10.2017
LU17.10.2017
BE31.10.2017
CH31.10.2017
LI31.10.2017
Former [2019/31]HU17.10.2005
AT26.04.2017
CZ26.04.2017
DK26.04.2017
EE26.04.2017
ES26.04.2017
FI26.04.2017
LT26.04.2017
LV26.04.2017
MC26.04.2017
PL26.04.2017
RO26.04.2017
SE26.04.2017
SI26.04.2017
SK26.04.2017
BG26.07.2017
GR27.07.2017
IS26.08.2017
IE17.10.2017
LU17.10.2017
BE31.10.2017
CH31.10.2017
LI31.10.2017
Former [2018/45]AT26.04.2017
CZ26.04.2017
DK26.04.2017
EE26.04.2017
ES26.04.2017
FI26.04.2017
LT26.04.2017
LV26.04.2017
MC26.04.2017
PL26.04.2017
RO26.04.2017
SE26.04.2017
SI26.04.2017
SK26.04.2017
BG26.07.2017
GR27.07.2017
IS26.08.2017
IE17.10.2017
LU17.10.2017
BE31.10.2017
CH31.10.2017
LI31.10.2017
Former [2018/36]AT26.04.2017
CZ26.04.2017
DK26.04.2017
EE26.04.2017
ES26.04.2017
FI26.04.2017
LT26.04.2017
LV26.04.2017
MC26.04.2017
PL26.04.2017
RO26.04.2017
SE26.04.2017
SI26.04.2017
SK26.04.2017
BG26.07.2017
GR27.07.2017
IS26.08.2017
LU17.10.2017
BE31.10.2017
CH31.10.2017
LI31.10.2017
Former [2018/35]AT26.04.2017
CZ26.04.2017
DK26.04.2017
EE26.04.2017
ES26.04.2017
FI26.04.2017
LT26.04.2017
LV26.04.2017
MC26.04.2017
PL26.04.2017
RO26.04.2017
SE26.04.2017
SI26.04.2017
SK26.04.2017
BG26.07.2017
GR27.07.2017
IS26.08.2017
LU17.10.2017
CH31.10.2017
LI31.10.2017
Former [2018/29]AT26.04.2017
CZ26.04.2017
DK26.04.2017
EE26.04.2017
ES26.04.2017
FI26.04.2017
LT26.04.2017
LV26.04.2017
MC26.04.2017
PL26.04.2017
RO26.04.2017
SE26.04.2017
SI26.04.2017
SK26.04.2017
BG26.07.2017
GR27.07.2017
IS26.08.2017
Former [2018/25]AT26.04.2017
CZ26.04.2017
DK26.04.2017
EE26.04.2017
ES26.04.2017
FI26.04.2017
LT26.04.2017
LV26.04.2017
PL26.04.2017
RO26.04.2017
SE26.04.2017
SI26.04.2017
SK26.04.2017
BG26.07.2017
GR27.07.2017
IS26.08.2017
Former [2018/10]AT26.04.2017
CZ26.04.2017
DK26.04.2017
EE26.04.2017
ES26.04.2017
FI26.04.2017
LT26.04.2017
LV26.04.2017
PL26.04.2017
RO26.04.2017
SE26.04.2017
SK26.04.2017
BG26.07.2017
GR27.07.2017
IS26.08.2017
Former [2018/09]AT26.04.2017
DK26.04.2017
EE26.04.2017
ES26.04.2017
FI26.04.2017
LT26.04.2017
LV26.04.2017
PL26.04.2017
SE26.04.2017
BG26.07.2017
GR27.07.2017
IS26.08.2017
Former [2017/50]AT26.04.2017
ES26.04.2017
FI26.04.2017
LT26.04.2017
LV26.04.2017
PL26.04.2017
SE26.04.2017
BG26.07.2017
GR27.07.2017
IS26.08.2017
Former [2017/49]AT26.04.2017
ES26.04.2017
FI26.04.2017
LT26.04.2017
GR27.07.2017
IS26.08.2017
Documents cited:Search[XY]US5729232  (FUJIMORI ICHIRO [JP]) [X] 1-8,25 * column 2, lines 3-19; figures 1,6 * [Y] 14-24;
 [XY]US5675340  (HESTER RICHARD KNIGHT [US], et al) [X] 14-25 * column 7, lines 60-end; figures 7,8,9 * [Y] 1-8;
 [XY]US5017920  (FRENCH BARRY T [US]) [X] 14 * figure 2 * [Y] 1-8,15-25;
 [Y]EP1193880  (UNIV COLLEGE CORK NAT UNIV IE [IE]) [Y] 1-8,14-25 * figure 1 *;
 [Y]US6535157  (GARRITY DOUGLAS [US], et al) [Y] 1-8,14-25 * figures 4,5 *;
 [XY]  - TAPANI RITONIEMI ET AL, "DESIGN OF STABLE HIGH ORDER 1-BIT SIGMA-DELTA MODULATORS", PROCEEDINGS OF THE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS. NEW ORLEANS, MAY 1 - 3, 1990; [PROCEEDINGS OF THE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS], NEW YORK, IEEE, US, (19900501), vol. 4 OF 04, pages 3267 - 3270, XP000163530 [X] 1-8 * figure 6 * [Y] 14-25
by applicantUS2006082481
 US2006082486
 US20040619007
The EPO accepts no responsibility for the accuracy of data originating from other authorities; in particular, it does not guarantee that it is complete, up to date or fit for specific purposes.