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Extract from the Register of European Patents

EP About this file: EP2555434

EP2555434 - TIME-INTERLEAVED METHOD A/D CONVERSION DEVICE [Right-click to bookmark this link]
StatusThe application has been withdrawn
Status updated on  14.10.2016
Database last updated on 24.08.2024
Most recent event   Tooltip14.10.2016Withdrawal of applicationpublished on 16.11.2016  [2016/46]
Applicant(s)For all designated states
NEC Corporation
7-1, Shiba 5-chome Minato-ku
Tokyo 108-8001 / JP
[2013/06]
Inventor(s)01 / YOSHIDA, Nobuhide
c/o NEC Corporation
7-1 Shiba 5-chome
Minato-ku
Tokyo 108-8001 / JP
02 / NOGUCHI, Hidemi
c/o NEC Corporation
7-1 Shiba 5-chome
Minato-ku
Tokyo 108-8001 / JP
 [2013/06]
Representative(s)Vossius & Partner Patentanwälte Rechtsanwälte mbB
Siebertstrasse 3
81675 München / DE
[N/P]
Former [2013/06]Vossius & Partner
Siebertstrasse 4
81675 München / DE
Application number, filing date11759178.401.03.2011
WO2011JP55175
Priority number, dateJP2010007148126.03.2010         Original published format: JP 2010071481
[2013/06]
Filing languageJA
Procedural languageEN
PublicationType: A1 Application with search report
No.:WO2011118370
Date:29.09.2011
Language:JA
[2011/39]
Type: A1 Application with search report 
No.:EP2555434
Date:06.02.2013
Language:EN
[2013/06]
Search report(s)International search report - published on:JP29.09.2011
(Supplementary) European search report - dispatched on:EP05.09.2013
ClassificationIPC:H03M1/12, H03M1/10
[2013/41]
CPC:
H03M1/1004 (EP,US); H03M1/1038 (EP,US); H03M1/1215 (EP,US)
Former IPC [2013/06]H03M1/12, H03M1/10, H04B10/02, H04B10/18
Designated contracting statesAL,   AT,   BE,   BG,   CH,   CY,   CZ,   DE,   DK,   EE,   ES,   FI,   FR,   GB,   GR,   HR,   HU,   IE,   IS,   IT,   LI,   LT,   LU,   LV,   MC,   MK,   MT,   NL,   NO,   PL,   PT,   RO,   RS,   SE,   SI,   SK,   SM,   TR [2013/06]
TitleGerman:A/D-UMWANDLUNGSVORRICHTUNG MIT ZEITVERSCHACHTELTEM VERFAHREN[2013/06]
English:TIME-INTERLEAVED METHOD A/D CONVERSION DEVICE[2013/06]
French:DISPOSITIF DE CONVERSION A/D À PROCÉDÉ À ENTRELACEMENT DANS LE TEMPS[2013/06]
Entry into regional phase06.09.2012Translation filed 
04.10.2012National basic fee paid 
04.10.2012Search fee paid 
04.10.2012Designation fee(s) paid 
04.10.2012Examination fee paid 
Examination proceduredeletedCommunication of intention to grant the patent
04.10.2012Examination requested  [2013/06]
26.03.2014Amendment by applicant (claims and/or description)
07.10.2016Application withdrawn by applicant  [2016/46]
Fees paidRenewal fee
22.03.2013Renewal fee patent year 03
21.03.2014Renewal fee patent year 04
23.03.2015Renewal fee patent year 05
18.03.2016Renewal fee patent year 06
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Documents cited:Search[A]US2008049847  (TELANG VIVEK [US], et al) [A] 1-9* the whole document *;
 [I]  - WENBO LIU ET AL, "A 600MS/s 30mW 0.13Â[mu]m CMOS ADC array achieving over 60dB SFDR with adaptive digital equalization", SOLID-STATE CIRCUITS CONFERENCE - DIGEST OF TECHNICAL PAPERS, 2009. ISSCC 2009. IEEE INTERNATIONAL, IEEE, PISCATAWAY, NJ, USA, (20090208), ISBN 978-1-4244-3458-9, pages 82 - 83,83a, XP031742175 [I] 1-9 * Interleaved adc system having a slower golden adc sampling the analog input at times corresponing to those of the interleaved converters; page 82; figure 4.5.1 *
International search[A]JPH05276036  (IWATSU ELECTRIC CO., LTD.);
 [A]JP2007150640  (HITACHI COMM TECH LTD)
by applicantJP2003133954
 JP2007150640
 JP2010071481
The EPO accepts no responsibility for the accuracy of data originating from other authorities; in particular, it does not guarantee that it is complete, up to date or fit for specific purposes.