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Extract from the Register of European Patents

EP About this file: EP2658197

EP2658197 - Programmable receiver equalization circuitry and methods [Right-click to bookmark this link]
StatusNo opposition filed within time limit
Status updated on  26.07.2019
Database last updated on 11.09.2024
FormerThe patent has been granted
Status updated on  17.08.2018
FormerGrant of patent is intended
Status updated on  07.05.2018
FormerExamination is in progress
Status updated on  30.06.2017
Most recent event   Tooltip26.07.2019No opposition filed within time limitpublished on 28.08.2019  [2019/35]
Applicant(s)For all designated states
Altera Corporation
101 Innovation Drive
San Jose, CA 95134 / US
[2013/44]
Inventor(s)01 / Maangat, Simardeep
c/o Altera Corporation
101 Innovation Drive
San Jose, CA 95134 / US
02 / Shumarayev, Sergey
c/o Altera Corporation
101 Innovation Drive
San Jose, CA 95134 / US
03 / Wong, Wilson
c/o Altera Corporation
101 Innovation Drive
San Jose, CA 95134 / US
04 / Tran, Thungoc
c/o Altera Corporation
101 Innovation Drive
San Jose, CA 95134 / US
 [2018/38]
Former [2013/44]01 / Maangat, Simardeep
c/o Altera Corporation
101 Innovation Drive
San Jose, CA California 95134 / US
02 / Shumarayev, Sergey
c/o Altera Corporation
101 Innovation Drive
San Jose, CA California 95134 / US
03 / Wong, Wilson
c/o Altera Corporation
101 Innovation Drive
San Jose, CA California 95134 / US
04 / Tran, Thungoc
c/o Altera Corporation
101 Innovation Drive
San Jose, CA California 95134 / US
Representative(s)Appelt, Christian W.
Boehmert & Boehmert
Anwaltspartnerschaft mbB
Pettenkoferstrasse 22
80336 München / DE
[2018/38]
Former [2013/44]Appelt, Christian W.
Boehmert & Boehmert
Pettenkoferstrasse 20-22
80336 München / DE
Application number, filing date13175861.710.07.2006
[2013/44]
Priority number, dateUS2005018265814.07.2005         Original published format: US 182658
[2013/44]
Filing languageEN
Procedural languageEN
PublicationType: A2 Application without search report 
No.:EP2658197
Date:30.10.2013
Language:EN
[2013/44]
Type: A3 Search report 
No.:EP2658197
Date:02.04.2014
Language:EN
[2014/14]
Type: B1 Patent specification 
No.:EP2658197
Date:19.09.2018
Language:EN
[2018/38]
Search report(s)(Supplementary) European search report - dispatched on:EP05.03.2014
ClassificationIPC:H04L25/03
[2014/14]
CPC:
H04L25/03885 (EP,US); H04B3/04 (EP,US); H04L25/03019 (EP,US)
Former IPC [2013/44]H04L25/03, H04B3/04
Designated contracting statesDE,   GB [2018/38]
Former [2013/44]DE,  GB 
TitleGerman:Programmierbare Empfängerentzerrungsschaltung und Verfahren[2013/44]
English:Programmable receiver equalization circuitry and methods[2013/44]
French:Circuit et procédés d'égalisation de récepteur programmable[2013/44]
Examination procedure02.09.2014Amendment by applicant (claims and/or description)
02.09.2014Examination requested  [2014/42]
30.06.2017Despatch of a communication from the examining division (Time limit: M04)
03.11.2017Reply to a communication from the examining division
08.05.2018Communication of intention to grant the patent
07.08.2018Fee for grant paid
07.08.2018Fee for publishing/printing paid
07.08.2018Receipt of the translation of the claim(s)
Parent application(s)   TooltipEP06014235.3  / EP1744510
Divisional application(s)The date of the Examining Division's first communication in respect of the earliest application for which a communication has been issued (EP20060014235) is  04.08.2011
Opposition(s)20.06.2019No opposition filed within time limit [2019/35]
Fees paidRenewal fee
10.07.2013Renewal fee patent year 03
10.07.2013Renewal fee patent year 04
10.07.2013Renewal fee patent year 05
10.07.2013Renewal fee patent year 06
10.07.2013Renewal fee patent year 07
10.07.2013Renewal fee patent year 08
08.07.2014Renewal fee patent year 09
09.07.2015Renewal fee patent year 10
11.07.2016Renewal fee patent year 11
12.07.2017Renewal fee patent year 12
11.07.2018Renewal fee patent year 13
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Documents cited:Search[A]US5257286  (RAY DANIEL L [US]) [A] 1,7 * figures 1,2 * * column 2, line 61 - column 5, line 2 *;
 [I]US2004141552  (YANG FUJI [US], et al) [I] 1-12 * figures 1,2,6 * * paragraphs [0009] , [0011] * * paragraphs [0026] , [0027] * * paragraph [0030] - paragraph [0036] *;
 [A]  - GONDI S ET AL, "A 10Gb/s CMOS adaptive equalizer for backplane applications", SOLID-STATE CIRCUITS CONFERENCE, 2005. DIGEST OF TECHNICAL PAPERS. ISS CC. 2005 IEEE INTERNATIONAL SAN FRANCISCO, CA, USA FEB. 6-10, 2005, PISCATAWAY, NJ, USA,IEEE, PISCATAWAY, NJ, USA, (20050101), ISBN 978-0-7803-8904-5, pages 328 - 601Vol.1, XP031173779 [A] 1,7 * the whole document *

DOI:   http://dx.doi.org/10.1109/ISSCC.2005.1494002
ExaminationUS6303922
 US2005123036
The EPO accepts no responsibility for the accuracy of data originating from other authorities; in particular, it does not guarantee that it is complete, up to date or fit for specific purposes.